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	Rebase local patches on top of quarterly timed release, allowing to drop numerous patches which have been accepted upstream since the release of U-Boot 2023.07.02. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
		
			
				
	
	
		
			224 lines
		
	
	
		
			4.9 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			224 lines
		
	
	
		
			4.9 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From d5841f8707dcb7a1f73607de67ab45dba93a56a4 Mon Sep 17 00:00:00 2001
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| From: Weijie Gao <weijie.gao@mediatek.com>
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| Date: Fri, 29 Jul 2022 17:04:12 +0800
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| Subject: [PATCH 55/71] board: mt7981: add reference board using new spi-nand
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|  driver
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| 
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| Add a new reference board using new spi-nand driver for SPI-NAND flash on
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| SNFI interface
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| 
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| Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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| ---
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|  arch/arm/dts/Makefile                  |   1 +
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|  arch/arm/dts/mt7981-snfi-nand-rfb.dts  | 132 +++++++++++++++++++++++++
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|  configs/mt7981_snfi_nand_rfb_defconfig |  57 +++++++++++
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|  3 files changed, 190 insertions(+)
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|  create mode 100644 arch/arm/dts/mt7981-snfi-nand-rfb.dts
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|  create mode 100644 configs/mt7981_snfi_nand_rfb_defconfig
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| 
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| --- a/arch/arm/dts/Makefile
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| +++ b/arch/arm/dts/Makefile
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| @@ -1425,6 +1425,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
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|  	mt7623n-bananapi-bpi-r2.dtb \
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|  	mt7629-rfb.dtb \
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|  	mt7981-rfb.dtb \
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| +	mt7981-snfi-nand-rfb.dtb \
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|  	mt7981-emmc-rfb.dtb \
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|  	mt7981-sd-rfb.dtb \
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|  	mt7986a-bpi-r3-sd.dtb \
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| --- /dev/null
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| +++ b/arch/arm/dts/mt7981-snfi-nand-rfb.dts
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| @@ -0,0 +1,132 @@
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| +// SPDX-License-Identifier: GPL-2.0
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| +/*
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| + * Copyright (c) 2021 MediaTek Inc.
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| + * Author: Sam Shih <sam.shih@mediatek.com>
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| + */
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| +
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| +/dts-v1/;
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| +#include "mt7981.dtsi"
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| +#include <dt-bindings/gpio/gpio.h>
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| +
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| +/ {
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| +	#address-cells = <1>;
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| +	#size-cells = <1>;
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| +	model = "mt7981-rfb";
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| +	compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
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| +	chosen {
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| +		stdout-path = &uart0;
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| +		tick-timer = &timer0;
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| +	};
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| +};
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| +
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| +&uart0 {
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| +	status = "okay";
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| +};
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| +
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| +&uart1 {
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| +	pinctrl-names = "default";
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| +	pinctrl-0 = <&uart1_pins>;
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| +	status = "disabled";
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| +};
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| +
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| +ð {
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| +	status = "okay";
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| +	mediatek,gmac-id = <0>;
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| +	phy-mode = "sgmii";
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| +	mediatek,switch = "mt7531";
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| +	reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
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| +
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| +	fixed-link {
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| +		speed = <1000>;
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| +		full-duplex;
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| +	};
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| +};
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| +
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| +&pinctrl {
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| +	snfi_pins: snfi-pins-func-1 {
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| +		mux {
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| +			function = "flash";
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| +			groups = "snfi";
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| +		};
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| +
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| +		clk {
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| +			pins = "SPI0_CLK";
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| +			drive-strength = <MTK_DRIVE_8mA>;
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| +			bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
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| +		};
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| +
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| +		conf-pu {
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| +			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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| +			drive-strength = <MTK_DRIVE_6mA>;
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| +			bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
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| +		};
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| +
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| +		conf-pd {
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| +			pins = "SPI0_MOSI", "SPI0_MISO";
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| +			drive-strength = <MTK_DRIVE_6mA>;
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| +			bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
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| +		};
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| +	};
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| +
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| +	spic_pins: spi1-pins-func-1 {
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| +		mux {
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| +			function = "spi";
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| +			groups = "spi1_1";
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| +		};
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| +	};
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| +
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| +	uart1_pins: spi1-pins-func-3 {
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| +		mux {
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| +			function = "uart";
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| +			groups = "uart1_2";
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| +		};
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| +	};
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| +
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| +	/* pin15 as pwm0 */
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| +	one_pwm_pins: one-pwm-pins {
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| +		mux {
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| +			function = "pwm";
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| +			groups = "pwm0_1";
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| +		};
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| +	};
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| +
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| +	/* pin15 as pwm0 and pin14 as pwm1 */
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| +	two_pwm_pins: two-pwm-pins {
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| +		mux {
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| +			function = "pwm";
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| +			groups = "pwm0_1", "pwm1_0";
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| +		};
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| +	};
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| +
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| +	/* pin15 as pwm0, pin14 as pwm1, pin7 as pwm2 */
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| +	three_pwm_pins: three-pwm-pins {
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| +		mux {
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| +			function = "pwm";
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| +			groups = "pwm0_1", "pwm1_0", "pwm2";
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| +		};
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| +	};
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| +
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| +	mmc0_pins_default: mmc0default {
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| +                mux {
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| +                       function = "flash";
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| +                       groups =  "emmc_45";
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| +                 };
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| +         };
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| +};
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| +
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| +&snand {
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| +	pinctrl-names = "default";
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| +	pinctrl-0 = <&snfi_pins>;
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| +	status = "okay";
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| +	quad-spi;
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| +};
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| +
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| +&pwm {
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| +	pinctrl-names = "default";
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| +	pinctrl-0 = <&two_pwm_pins>;
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| +	status = "okay";
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| +};
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| +
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| +&watchdog {
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| +	status = "disabled";
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| +};
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| --- /dev/null
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| +++ b/configs/mt7981_snfi_nand_rfb_defconfig
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| @@ -0,0 +1,57 @@
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| +CONFIG_ARM=y
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| +CONFIG_POSITION_INDEPENDENT=y
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| +CONFIG_ARCH_MEDIATEK=y
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| +CONFIG_TEXT_BASE=0x41e00000
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| +CONFIG_SYS_MALLOC_F_LEN=0x4000
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| +CONFIG_NR_DRAM_BANKS=1
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| +CONFIG_ENV_SIZE=0x20000
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| +CONFIG_DEFAULT_DEVICE_TREE="mt7981-snfi-nand-rfb"
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| +CONFIG_TARGET_MT7981=y
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| +CONFIG_DEBUG_UART_BASE=0x11002000
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| +CONFIG_DEBUG_UART_CLOCK=40000000
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| +CONFIG_SYS_LOAD_ADDR=0x46000000
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| +CONFIG_DEBUG_UART=y
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| +# CONFIG_AUTOBOOT is not set
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| +CONFIG_DEFAULT_FDT_FILE="mt7981-snfi-nand-rfb"
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| +CONFIG_LOGLEVEL=7
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| +CONFIG_LOG=y
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| +CONFIG_SYS_PROMPT="MT7981> "
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| +CONFIG_SYS_CBSIZE=512
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| +CONFIG_SYS_PBSIZE=1049
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| +# CONFIG_BOOTM_NETBSD is not set
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| +# CONFIG_BOOTM_PLAN9 is not set
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| +# CONFIG_BOOTM_RTEMS is not set
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| +# CONFIG_BOOTM_VXWORKS is not set
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| +# CONFIG_CMD_ELF is not set
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| +# CONFIG_CMD_UNLZ4 is not set
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| +# CONFIG_CMD_UNZIP is not set
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| +CONFIG_CMD_GPIO=y
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| +CONFIG_CMD_MTD=y
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| +CONFIG_CMD_PING=y
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| +CONFIG_CMD_SMC=y
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| +CONFIG_MTDIDS_DEFAULT="spi-nand0=spi-nand0"
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| +CONFIG_MTDPARTS_DEFAULT="spi-nand0:1024k(bl2),512k(u-boot-env),2048k(factory),2048k(fip),65536k(ubi)"
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| +CONFIG_CMD_UBI=y
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| +CONFIG_CMD_UBI_RENAME=y
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| +CONFIG_ENV_OVERWRITE=y
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| +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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| +CONFIG_NET_RANDOM_ETHADDR=y
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| +CONFIG_REGMAP=y
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| +CONFIG_SYSCON=y
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| +CONFIG_CLK=y
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| +# CONFIG_MMC is not set
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| +CONFIG_MTD=y
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| +CONFIG_DM_MTD=y
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| +CONFIG_MTK_SPI_NAND=y
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| +CONFIG_MTK_SPI_NAND_MTD=y
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| +CONFIG_PHY_FIXED=y
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| +CONFIG_DM_ETH=y
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| +CONFIG_MEDIATEK_ETH=y
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| +CONFIG_PINCTRL=y
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| +CONFIG_PINCONF=y
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| +CONFIG_PINCTRL_MT7981=y
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| +CONFIG_POWER_DOMAIN=y
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| +CONFIG_MTK_POWER_DOMAIN=y
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| +CONFIG_DM_SERIAL=y
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| +CONFIG_MTK_SERIAL=y
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| +CONFIG_HEXDUMP=y
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