mirror of
git://git.openwrt.org/openwrt/openwrt.git
synced 2025-12-12 15:42:11 -05:00
011ba05fd3
The most relevant change is the removal of the empty board_init() functions by u-boot/u-boot@70a4d1fa1d, which makes many patches not apply anymore and also requires most board defconfigs to be updated by adding "# CONFIG_BOARD_INIT is not set" to them. Also some config symbols have been renamed and downstream boards had to be adapted accordingly: u-boot/u-boot@0fd9a3480a ("env: Rename OVERWRITE_ETHADDR_ONCE to ENV_OVERWRITE_ETHADDR_ONCE") u-boot/u-boot@5fb88fa725 ("env: Rename SYS_REDUNDAND_ENVIRONMENT to ENV_REDUNDANT") u-boot/u-boot@123682c765 ("env: Rename SYS_RELOC_GD_ENV_ADDR to ENV_RELOC_GD_ENV_ADDR") u-boot/u-boot@0f44d5549e ("env: Rename SYS_MMC_ENV_DEV to ENV_MMC_DEVICE_INDEX") u-boot/u-boot@31617b880a ("env: Rename SYS_MMC_ENV_PART to ENV_MMC_EMMC_HW_PARTITION") u-boot/u-boot@ffc4914703 ("env: Rename ENV_MMC_PARTITION to ENV_MMC_SW_PARTITION") u-boot/u-boot@fb5235239a ("env: Rename DEFAULT_ENV_FILE to ENV_DEFAULT_ENV_TEXT_FILE") (also renamed USE_DEFAULT_ENV_FILE to USE_ENV_DEFAULT_ENV_TEXT_FILE) Remove upstreamed patches: * 001-mtd-spinand-winbond-add-Winbond-W25N04KV-flash-suppo.patch u-boot/u-boot@fe37fb8214 * 002-mtd-spinand-gigadevice-sync-supported-chips-with-lin.patch u-boot/u-boot@506ceddffd * 003-net-mediatek-correct-the-AN8855-TPID-value-in-port-i.patch u-boot/u-boot@70db2be9fb * 004-01-serial-mediatek-fix-register-names-and-offsets.patch u-boot/u-boot@6e15d3f91a * 004-02-serial-mediatek-enable-baudrate-accuracy-compensatio.patch u-boot/u-boot@6952209ef2 * 005-clk-mediatek-add-dummy-clk-enable-disable-ops-for-ap.patch u-boot/u-boot@1bf2121297 * 006-env-Fix-possible-out-of-bound-access-in-env_do_env_s.patch u-boot/u-boot@0ffd456516 * 130-01-env-mtd-add-the-missing-put_mtd_device.patch u-boot/u-boot@39ae954b04 * 130-02-env-mtd-initialize-saved_buf-pointer.patch u-boot/u-boot@7e842bd331 * 170-cmd-bootmenu-permit-to-select-bootmenu-entry-with.patch u-boot/u-boot@8c986521c3 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
271 lines
7.2 KiB
Diff
271 lines
7.2 KiB
Diff
--- /dev/null
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+++ b/arch/arm/dts/mt7986a-glinet-gl-mt6000.dts
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@@ -0,0 +1,131 @@
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+// SPDX-License-Identifier: GPL-2.0
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+
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+/dts-v1/;
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+#include <dt-bindings/input/linux-event-codes.h>
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+#include <dt-bindings/gpio/gpio.h>
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+
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+#include "mt7986.dtsi"
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+
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+/ {
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+ model = "GL.iNet GL-MT6000";
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+ compatible = "glinet,gl-mt6000", "mediatek,mt7986-emmc-rfb", "mediatek,mt7986";
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+
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+ chosen {
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+ stdout-path = &uart0;
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+ tick-timer = &timer0;
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+ };
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+
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+ memory@40000000 {
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+ device_type = "memory";
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+ reg = <0x40000000 0x40000000>;
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+ };
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+
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+ reg_1p8v: regulator-1p8v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "fixed-1.8V";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ };
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+
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+ reg_3p3v: regulator-3p3v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "fixed-3.3V";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ };
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+
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+ keys {
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+ compatible = "gpio-keys";
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+
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+ wps {
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+ label = "reset";
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+ gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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+ linux,code = <KEY_RESTART>;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ led_status_blue: green {
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+ label = "blue:status";
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+ gpios = <&pio 28 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ led_status_white: blue {
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+ label = "white:status";
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+ gpios = <&pio 27 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+
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+};
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+
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+&uart0 {
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+ mediatek,force-highspeed;
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+ status = "okay";
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+};
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+
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+ð {
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+ status = "okay";
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+ mediatek,gmac-id = <0>;
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+ phy-mode = "2500base-x";
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+ mediatek,switch = "mt7531";
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+ reset-gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
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+
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+ fixed-link {
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+ speed = <2500>;
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+ full-duplex;
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+ };
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+};
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+
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+&pio {
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+ mmc0_pins_default: mmc0default {
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+ mux {
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+ function = "flash";
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+ groups = "emmc_51";
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+ };
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+
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+ conf-cmd-dat {
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+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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+ input-enable;
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+ drive-strength = <MTK_DRIVE_4mA>;
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+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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+ };
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+
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+ conf-clk {
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+ pins = "EMMC_CK";
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+ drive-strength = <MTK_DRIVE_6mA>;
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+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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+ };
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+
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+ conf-dsl {
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+ pins = "EMMC_DSL";
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+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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+ };
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+
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+ conf-rst {
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+ pins = "EMMC_RSTB";
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+ drive-strength = <MTK_DRIVE_4mA>;
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+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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+ };
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+ };
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+};
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+
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+&mmc0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mmc0_pins_default>;
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+ bus-width = <8>;
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+ max-frequency = <200000000>;
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+ cap-mmc-highspeed;
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+ cap-mmc-hw-reset;
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+ vmmc-supply = <®_3p3v>;
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+ vqmmc-supply = <®_1p8v>;
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+ non-removable;
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+ status = "okay";
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+};
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--- /dev/null
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+++ b/configs/mt7986a_glinet_gl-mt6000_defconfig
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@@ -0,0 +1,105 @@
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+CONFIG_ARM=y
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+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
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+CONFIG_POSITION_INDEPENDENT=y
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+CONFIG_ARCH_MEDIATEK=y
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+CONFIG_TEXT_BASE=0x41e00000
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+CONFIG_SYS_MALLOC_F_LEN=0x4000
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+CONFIG_NR_DRAM_BANKS=1
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+CONFIG_ENV_SIZE=0x80000
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+CONFIG_ENV_OFFSET=0x400000
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+CONFIG_DEFAULT_DEVICE_TREE="mt7986a-glinet-gl-mt6000"
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+CONFIG_OF_LIBFDT_OVERLAY=y
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+CONFIG_TARGET_MT7986=y
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+CONFIG_SYS_LOAD_ADDR=0x46000000
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+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
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+CONFIG_DEBUG_UART_BASE=0x11002000
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+CONFIG_DEBUG_UART_CLOCK=40000000
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+CONFIG_DEBUG_UART=y
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+CONFIG_AHCI=y
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+CONFIG_FIT=y
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+CONFIG_AUTOBOOT_KEYED=y
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+CONFIG_AUTOBOOT_MENU_SHOW=y
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+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-glinet-gl-mt6000.dtb"
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+CONFIG_LOGLEVEL=7
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+CONFIG_PRE_CONSOLE_BUFFER=y
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+CONFIG_LOG=y
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+# CONFIG_BOARD_INIT is not set
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+CONFIG_BOARD_LATE_INIT=y
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+CONFIG_HUSH_PARSER=y
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+CONFIG_SYS_PROMPT="MT7986> "
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+CONFIG_CMD_CPU=y
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+CONFIG_CMD_LICENSE=y
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+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
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+CONFIG_CMD_BOOTMENU=y
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+CONFIG_CMD_ASKENV=y
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+CONFIG_CMD_ERASEENV=y
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+CONFIG_CMD_ENV_FLAGS=y
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+CONFIG_CMD_STRINGS=y
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+CONFIG_CMD_DM=y
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+CONFIG_CMD_GPIO=y
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+CONFIG_CMD_PWM=y
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+CONFIG_CMD_GPT=y
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+CONFIG_CMD_MMC=y
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+CONFIG_CMD_PART=y
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+CONFIG_CMD_USB=y
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+CONFIG_CMD_TFTPSRV=y
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+CONFIG_CMD_RARP=y
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+CONFIG_CMD_CDP=y
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+CONFIG_CMD_SNTP=y
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+CONFIG_CMD_LINK_LOCAL=y
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+CONFIG_CMD_DHCP=y
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+CONFIG_CMD_DNS=y
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+CONFIG_CMD_PING=y
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+CONFIG_CMD_CACHE=y
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+CONFIG_CMD_PSTORE=y
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+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
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+CONFIG_CMD_UUID=y
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+CONFIG_CMD_HASH=y
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+CONFIG_CMD_SMC=y
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+CONFIG_OF_EMBED=y
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+CONFIG_ENV_OVERWRITE=y
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+CONFIG_ENV_IS_IN_MMC=y
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+CONFIG_ENV_RELOC_GD_ENV_ADDR=y
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+CONFIG_ENV_USE_DEFAULT_ENV_TEXT_FILE=y
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+CONFIG_ENV_DEFAULT_ENV_TEXT_FILE="defenvs/glinet_gl-mt6000_env"
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+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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+CONFIG_VERSION_VARIABLE=y
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+CONFIG_NETCONSOLE=y
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+CONFIG_USE_IPADDR=y
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+CONFIG_IPADDR="192.168.1.1"
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+CONFIG_USE_SERVERIP=y
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+CONFIG_SERVERIP="192.168.1.254"
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+CONFIG_NET_RANDOM_ETHADDR=y
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+CONFIG_BUTTON=y
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+CONFIG_BUTTON_GPIO=y
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+CONFIG_CLK=y
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+CONFIG_GPIO_HOG=y
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+CONFIG_LED=y
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+CONFIG_LED_BLINK=y
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+CONFIG_LED_GPIO=y
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+CONFIG_SUPPORT_EMMC_BOOT=y
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+CONFIG_MMC_HS200_SUPPORT=y
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+CONFIG_MMC_MTK=y
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+CONFIG_PHY_FIXED=y
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+CONFIG_MEDIATEK_ETH=y
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+CONFIG_PHY=y
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+CONFIG_PHY_MTK_TPHY=y
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+CONFIG_PINCTRL=y
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+CONFIG_PINCONF=y
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+CONFIG_PINCTRL_MT7986=y
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+CONFIG_POWER_DOMAIN=y
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+CONFIG_MTK_POWER_DOMAIN=y
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+CONFIG_DM_REGULATOR=y
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+CONFIG_DM_REGULATOR_FIXED=y
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+CONFIG_DM_REGULATOR_GPIO=y
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+CONFIG_DM_PWM=y
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+CONFIG_PWM_MTK=y
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+CONFIG_RAM=y
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+CONFIG_DM_SERIAL=y
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+CONFIG_SERIAL_RX_BUFFER=y
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+CONFIG_MTK_SERIAL=y
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+CONFIG_USB=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_XHCI_MTK=y
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+CONFIG_USB_STORAGE=y
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+CONFIG_HEXDUMP=y
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--- /dev/null
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+++ b/defenvs/glinet_gl-mt6000_env
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@@ -0,0 +1,25 @@
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+ipaddr=192.168.1.1
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+serverip=192.168.1.254
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+loadaddr=0x46000000
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+bootdelay=3
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+bootfile_bl2=openwrt-mediatek-filogic-glinet_gl-mt6000-preloader.bin
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+bootfile_fip=openwrt-mediatek-filogic-glinet_gl-mt6000-bl31-uboot.fip
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+bootfile_firmware=openwrt-mediatek-filogic-glinet_gl-mt6000-squashfs-factory.bin
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+bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
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+bootmenu_title= *** U-Boot Boot Menu for GL-iNet GL-MT6000 ***
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+bootmenu_0=Startup system (Default).=run boot_system
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+bootmenu_1=Load Firmware via TFTP then write to eMMC.=run boot_tftp_firmware ; run bootmenu_confirm_return
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+bootmenu_2=Load BL31+U-Boot FIP via TFTP then write to eMMC.=run boot_tftp_write_fip ; run bootmenu_confirm_return
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+bootmenu_3=Load BL2 preloader via TFTP then write to eMMC.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
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+bootmenu_4=Reboot.=reset
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+bootmenu_5=Reset all settings to factory defaults.=run reset_factory ; reset
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+filesize_to_blk=setexpr cnt $filesize + 0x1ff && setexpr cnt $cnt / 0x200
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+mmc_read_kernel=mmc read $loadaddr $part_addr 0x100 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr $part_addr $image_size
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+boot_system=part start mmc 0 kernel part_addr && part size mmc 0 kernel part_size && run mmc_read_kernel && bootm
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+boot_tftp_firmware=tftpboot $loadaddr $bootfile_firmware && run emmc_write_firmware
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+boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run emmc_write_fip
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+boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run emmc_write_bl2
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+emmc_write_firmware=part start mmc 0 kernel part_addr && run filesize_to_blk && mmc write $loadaddr $part_addr $cnt
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+emmc_write_bl2=run filesize_to_blk && test 0x$cnt -le 0x800 && mmc partconf 0 1 1 1 && && mmc write $loadaddr 0x0 0x800 ; mmc partconf 0 1 1 0
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+emmc_write_fip=part start mmc 0 fip part_addr && part size mmc 0 fip part_size && run filesize_to_blk && test 0x$cnt -le 0x$part_size && mmc write $loadaddr $part_addr $cnt
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+reset_factory=eraseenv && reset
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