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572ea68070
Import pending patches adding support for MT7988 and provide builds for the reference board for all possible boot media. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
150 lines
4.6 KiB
Diff
150 lines
4.6 KiB
Diff
From 8e59c3cc700a6efb8db574f3c8e18b6181b4a07d Mon Sep 17 00:00:00 2001
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From: Weijie Gao <weijie.gao@mediatek.com>
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Date: Wed, 19 Jul 2023 17:17:13 +0800
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Subject: [PATCH 20/29] net: mediatek: add support for SGMII 1Gbps
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auto-negotiation mode
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Existing SGMII support of mtk-eth is actually a MediaTek-specific
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2.5Gbps high-speed SGMII (HSGMII) which does not support
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auto-negotiation mode.
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This patch adds SGMII 1Gbps auto-negotiation mode and rename the
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existing HSGMII to 2500basex.
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Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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---
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drivers/net/mtk_eth.c | 46 +++++++++++++++++++++++++++++++++++++------
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drivers/net/mtk_eth.h | 2 ++
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2 files changed, 42 insertions(+), 6 deletions(-)
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--- a/drivers/net/mtk_eth.c
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+++ b/drivers/net/mtk_eth.c
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@@ -893,7 +893,7 @@ static int mt7531_setup(struct mtk_eth_p
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if (!port5_sgmii)
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mt7531_port_rgmii_init(priv, 5);
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break;
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- case PHY_INTERFACE_MODE_SGMII:
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+ case PHY_INTERFACE_MODE_2500BASEX:
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mt7531_port_sgmii_init(priv, 6);
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if (port5_sgmii)
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mt7531_port_sgmii_init(priv, 5);
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@@ -986,6 +986,7 @@ static void mtk_phy_link_adjust(struct m
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(MAC_RX_PKT_LEN_1536 << MAC_RX_PKT_LEN_S) |
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MAC_MODE | FORCE_MODE |
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MAC_TX_EN | MAC_RX_EN |
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+ DEL_RXFIFO_CLR |
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BKOFF_EN | BACKPR_EN;
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switch (priv->phydev->speed) {
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@@ -996,6 +997,7 @@ static void mtk_phy_link_adjust(struct m
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mcr |= (SPEED_100M << FORCE_SPD_S);
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break;
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case SPEED_1000:
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+ case SPEED_2500:
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mcr |= (SPEED_1000M << FORCE_SPD_S);
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break;
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};
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@@ -1048,7 +1050,8 @@ static int mtk_phy_start(struct mtk_eth_
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return 0;
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}
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- mtk_phy_link_adjust(priv);
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+ if (!priv->force_mode)
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+ mtk_phy_link_adjust(priv);
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debug("Speed: %d, %s duplex%s\n", phydev->speed,
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(phydev->duplex) ? "full" : "half",
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@@ -1076,7 +1079,31 @@ static int mtk_phy_probe(struct udevice
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return 0;
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}
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-static void mtk_sgmii_init(struct mtk_eth_priv *priv)
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+static void mtk_sgmii_an_init(struct mtk_eth_priv *priv)
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+{
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+ /* Set SGMII GEN1 speed(1G) */
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+ clrsetbits_le32(priv->sgmii_base + priv->soc->ana_rgc3,
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+ SGMSYS_SPEED_2500, 0);
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+
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+ /* Enable SGMII AN */
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+ setbits_le32(priv->sgmii_base + SGMSYS_PCS_CONTROL_1,
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+ SGMII_AN_ENABLE);
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+
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+ /* SGMII AN mode setting */
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+ writel(SGMII_AN_MODE, priv->sgmii_base + SGMSYS_SGMII_MODE);
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+
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+ /* SGMII PN SWAP setting */
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+ if (priv->pn_swap) {
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+ setbits_le32(priv->sgmii_base + SGMSYS_QPHY_WRAP_CTRL,
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+ SGMII_PN_SWAP_TX_RX);
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+ }
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+
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+ /* Release PHYA power down state */
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+ clrsetbits_le32(priv->sgmii_base + SGMSYS_QPHY_PWR_STATE_CTRL,
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+ SGMII_PHYA_PWD, 0);
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+}
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+
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+static void mtk_sgmii_force_init(struct mtk_eth_priv *priv)
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{
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/* Set SGMII GEN2 speed(2.5G) */
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setbits_le32(priv->sgmii_base + priv->soc->ana_rgc3,
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@@ -1111,10 +1138,14 @@ static void mtk_mac_init(struct mtk_eth_
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ge_mode = GE_MODE_RGMII;
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break;
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case PHY_INTERFACE_MODE_SGMII:
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+ case PHY_INTERFACE_MODE_2500BASEX:
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ge_mode = GE_MODE_RGMII;
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mtk_ethsys_rmw(priv, ETHSYS_SYSCFG0_REG, SYSCFG0_SGMII_SEL_M,
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SYSCFG0_SGMII_SEL(priv->gmac_id));
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- mtk_sgmii_init(priv);
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+ if (priv->phy_interface == PHY_INTERFACE_MODE_SGMII)
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+ mtk_sgmii_an_init(priv);
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+ else
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+ mtk_sgmii_force_init(priv);
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break;
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case PHY_INTERFACE_MODE_MII:
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case PHY_INTERFACE_MODE_GMII:
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@@ -1148,6 +1179,7 @@ static void mtk_mac_init(struct mtk_eth_
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mcr |= SPEED_100M << FORCE_SPD_S;
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break;
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case SPEED_1000:
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+ case SPEED_2500:
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mcr |= SPEED_1000M << FORCE_SPD_S;
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break;
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}
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@@ -1490,13 +1522,15 @@ static int mtk_eth_of_to_plat(struct ude
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priv->duplex = ofnode_read_bool(subnode, "full-duplex");
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if (priv->speed != SPEED_10 && priv->speed != SPEED_100 &&
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- priv->speed != SPEED_1000) {
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+ priv->speed != SPEED_1000 && priv->speed != SPEED_2500 &&
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+ priv->speed != SPEED_10000) {
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printf("error: no valid speed set in fixed-link\n");
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return -EINVAL;
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}
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}
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- if (priv->phy_interface == PHY_INTERFACE_MODE_SGMII) {
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+ if (priv->phy_interface == PHY_INTERFACE_MODE_SGMII ||
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+ priv->phy_interface == PHY_INTERFACE_MODE_2500BASEX) {
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/* get corresponding sgmii phandle */
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ret = dev_read_phandle_with_args(dev, "mediatek,sgmiisys",
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NULL, 0, 0, &args);
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--- a/drivers/net/mtk_eth.h
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+++ b/drivers/net/mtk_eth.h
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@@ -69,6 +69,7 @@ enum mkt_eth_capabilities {
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#define SGMII_AN_RESTART BIT(9)
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#define SGMSYS_SGMII_MODE 0x20
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+#define SGMII_AN_MODE 0x31120103
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#define SGMII_FORCE_MODE 0x31120019
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#define SGMSYS_QPHY_PWR_STATE_CTRL 0xe8
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@@ -168,6 +169,7 @@ enum mkt_eth_capabilities {
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#define FORCE_MODE BIT(15)
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#define MAC_TX_EN BIT(14)
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#define MAC_RX_EN BIT(13)
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+#define DEL_RXFIFO_CLR BIT(12)
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#define BKOFF_EN BIT(9)
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#define BACKPR_EN BIT(8)
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#define FORCE_RX_FC BIT(5)
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