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			57 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			57 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From bc7a0478e6dac1304fdfdb6f3056f438b632da62 Mon Sep 17 00:00:00 2001
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| From: Chen-Yu Tsai <wens@csie.org>
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| Date: Mon, 10 Feb 2014 18:35:48 +0800
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| Subject: [PATCH] ARM: dts: sun7i: Add GMAC clock node to sun7i DTSI
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| 
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| The GMAC uses 1 of 2 sources for its transmit clock, depending on the
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| PHY interface mode. Add both sources as dummy clocks, and as parents
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| to the GMAC clock node.
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| 
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| Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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| ---
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|  arch/arm/boot/dts/sun7i-a20.dtsi | 28 ++++++++++++++++++++++++++++
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|  1 file changed, 28 insertions(+)
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| 
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| diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
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| index cefd7ac..7d98edc 100644
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| --- a/arch/arm/boot/dts/sun7i-a20.dtsi
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| +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
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| @@ -322,6 +322,34 @@
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|  		};
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|  
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|  		/*
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| +		 * The following two are dummy clocks, placeholders used in the gmac_tx
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| +		 * clock. The gmac driver will choose one parent depending on the PHY
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| +		 * interface mode, using clk_set_rate auto-reparenting.
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| +		 * The actual TX clock rate is not controlled by the gmac_tx clock.
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| +		 */
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| +		mii_phy_tx_clk: clk@2 {
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| +			#clock-cells = <0>;
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| +			compatible = "fixed-clock";
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| +			clock-frequency = <25000000>;
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| +			clock-output-names = "mii_phy_tx";
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| +		};
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| +
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| +		gmac_int_tx_clk: clk@3 {
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| +			#clock-cells = <0>;
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| +			compatible = "fixed-clock";
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| +			clock-frequency = <125000000>;
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| +			clock-output-names = "gmac_int_tx";
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| +		};
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| +
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| +		gmac_tx_clk: clk@01c20164 {
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| +			#clock-cells = <0>;
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| +			compatible = "allwinner,sun7i-a20-gmac-clk";
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| +			reg = <0x01c20164 0x4>;
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| +			clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
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| +			clock-output-names = "gmac_tx";
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| +		};
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| +
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| +		/*
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|  		 * Dummy clock used by output clocks
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|  		 */
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|  		osc24M_32k: clk@1 {
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| -- 
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| 1.8.5.5
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| 
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