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			142 lines
		
	
	
		
			4.2 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			142 lines
		
	
	
		
			4.2 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| --- a/ath/if_ath.c
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| +++ b/ath/if_ath.c
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| @@ -161,6 +161,7 @@ static void ath_beacon_send(struct ath_s
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|  static void ath_beacon_return(struct ath_softc *, struct ath_buf *);
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|  static void ath_beacon_free(struct ath_softc *);
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|  static void ath_beacon_config(struct ath_softc *, struct ieee80211vap *);
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| +static void ath_hw_beacon_stop(struct ath_softc *sc);
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|  static int ath_desc_alloc(struct ath_softc *);
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|  static void ath_desc_free(struct ath_softc *);
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|  static void ath_desc_swap(struct ath_desc *);
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| @@ -2793,6 +2794,72 @@ ath_set_ack_bitrate(struct ath_softc *sc
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|  	return 1;
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|  }
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|  
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| +static void
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| +ath_hw_beacon_stop(struct ath_softc *sc)
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| +{
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| +	HAL_BEACON_TIMERS btimers;
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| +
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| +	btimers.bt_intval = 0;
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| +	btimers.bt_nexttbtt = 0;
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| +	btimers.bt_nextdba = 0xffffffff;
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| +	btimers.bt_nextswba = 0xffffffff;
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| +	btimers.bt_nextatim = 0;
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| +
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| +	ath_hal_setbeacontimers(sc->sc_ah, &btimers);
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| +}
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| +
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| +/* Fix up the ATIM window after TSF resync */
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| +static int
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| +ath_hw_check_atim(struct ath_softc *sc, int window, int intval)
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| +{
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| +#define AR5K_TIMER0_5210       0x802c  /* Next beacon time register */
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| +#define AR5K_TIMER0_5211       0x8028
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| +#define AR5K_TIMER3_5210       0x8038  /* End of ATIM window time register */
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| +#define AR5K_TIMER3_5211       0x8034
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| +	struct ath_hal *ah = sc->sc_ah;
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| +	int dev = sc->sc_ah->ah_macType;
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| +	unsigned int nbtt, atim;
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| +	int is_5210 = 0;
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| +
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| +	/*
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| +	 * check if the ATIM window is still correct:
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| +	 *   1.) usually ATIM should be NBTT + window
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| +	 *   2.) nbtt already updated
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| +	 *   3.) nbtt already updated and has wrapped around
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| +	 *   4.) atim has wrapped around
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| +	 */
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| +	switch(dev) {
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| +	case 5210:
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| +		nbtt = OS_REG_READ(ah, AR5K_TIMER0_5210);
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| +		atim = OS_REG_READ(ah, AR5K_TIMER3_5210);
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| +		is_5210 = 1;
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| +		break;
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| +	case 5211:
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| +	case 5212:
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| +		nbtt = OS_REG_READ(ah, AR5K_TIMER0_5211);
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| +		atim = OS_REG_READ(ah, AR5K_TIMER3_5211);
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| +		break;
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| +	/* NB: 5416+ doesn't do ATIM in hw */
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| +	case 5416:
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| +	default:
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| +		return 0;
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| +	}
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| +
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| +	if ((atim - nbtt != window) &&				/* 1.) */
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| +	    (nbtt - atim != intval - window) &&			/* 2.) */
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| +	    ((nbtt | 0x10000) - atim != intval - window) &&	/* 3.) */
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| +	    ((atim | 0x10000) - nbtt != window)) {		/* 4.) */
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| +		if (is_5210)
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| +			OS_REG_WRITE(ah, AR5K_TIMER3_5210, nbtt + window );
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| +		else
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| +			OS_REG_WRITE(ah, AR5K_TIMER3_5211, nbtt + window );
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| +		return atim - nbtt;
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| +	}
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| +
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| +	return 0;
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| +}
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| +
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| +
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|  /*
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|   * Reset the hardware w/o losing operational state.  This is
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|   * basically a more efficient way of doing ath_stop, ath_init,
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| @@ -5294,6 +5361,7 @@ ath_beacon_config(struct ath_softc *sc, 
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|  	u_int64_t tsf, hw_tsf;
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|  	u_int32_t tsftu, hw_tsftu;
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|  	u_int32_t intval, nexttbtt = 0;
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| +	unsigned long flags;
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|  	int reset_tsf = 0;
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|  
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|  	if (vap == NULL)
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| @@ -5301,6 +5369,9 @@ ath_beacon_config(struct ath_softc *sc, 
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|  
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|  	ni = vap->iv_bss;
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|  
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| +	/* TSF calculation is timing critical - we don't want to be interrupted here */
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| +	local_irq_save(flags);
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| +
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|  	hw_tsf = ath_hal_gettsf64(ah);
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|  	tsf = le64_to_cpu(ni->ni_tstamp.tsf);
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|  	hw_tsftu = hw_tsf >> 10;
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| @@ -5490,15 +5561,27 @@ ath_beacon_config(struct ath_softc *sc, 
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|  				<= ath_hal_sw_beacon_response_time)
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|  			nexttbtt += intval;
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|  		sc->sc_nexttbtt = nexttbtt;
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| +
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| +		/* stop beacons before reconfiguring the timers to avoid race
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| +		 * conditions. ath_hal_beaconinit will start them again */
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| +		ath_hw_beacon_stop(sc);
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| +
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|  		ath_hal_beaconinit(ah, nexttbtt, intval);
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|  		if (intval & HAL_BEACON_RESET_TSF) {
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|  			sc->sc_last_tsf = 0;
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|  		}
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|  		sc->sc_bmisscount = 0;
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|  		ath_hal_intrset(ah, sc->sc_imask);
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| +
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| +		if ((sc->sc_opmode == HAL_M_IBSS) && ath_hw_check_atim(sc, 1, intval & HAL_BEACON_PERIOD)) {
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| +			DPRINTF(sc, ATH_DEBUG_BEACON,
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| +				"fixed atim window after beacon init\n");
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| +		}
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|  	}
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|  
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|  ath_beacon_config_debug:
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| +	local_irq_restore(flags);
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| +
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|  	/* We print all debug messages here, in order to preserve the
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|  	 * time critical aspect of this function */
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|  	DPRINTF(sc, ATH_DEBUG_BEACON,
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| @@ -6401,6 +6484,11 @@ ath_recv_mgmt(struct ieee80211vap * vap,
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|  			DPRINTF(sc, ATH_DEBUG_BEACON, 
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|  				"Updated beacon timers\n");
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|  		}
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| +		if ((sc->sc_opmode == HAL_M_IBSS) &&
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| +				IEEE80211_ADDR_EQ(ni->ni_bssid, vap->iv_bss->ni_bssid) &&
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| +				ath_hw_check_atim(sc, 1, vap->iv_bss->ni_intval)) {
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| +			DPRINTF(sc, ATH_DEBUG_ANY, "Fixed ATIM window after beacon recv\n");
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| +		}
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|  		/* NB: Fall Through */
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|  	case IEEE80211_FC0_SUBTYPE_PROBE_RESP:
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|  		if (vap->iv_opmode == IEEE80211_M_IBSS &&
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