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	Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
		
			
				
	
	
		
			140 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			140 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
From e1cf48a13626d0c42c5191dc4852f4dc271de010 Mon Sep 17 00:00:00 2001
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From: Han Xu <han.xu@nxp.com>
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Date: Tue, 9 Jul 2019 16:21:14 -0500
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Subject: [PATCH] spi: spi-fsl-qspi: dynamically alloc AHB memory for QSPI
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dynamically alloc AHB memory for QSPI controller.
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Signed-off-by: Han Xu <han.xu@nxp.com>
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[rebase]
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Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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---
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 drivers/spi/spi-fsl-qspi.c | 60 +++++++++++++++++++++++++++++++++-------------
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 1 file changed, 43 insertions(+), 17 deletions(-)
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--- a/drivers/spi/spi-fsl-qspi.c
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+++ b/drivers/spi/spi-fsl-qspi.c
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@@ -192,6 +192,8 @@
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  */
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 #define QUADSPI_QUIRK_USE_TDH_SETTING	BIT(5)
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+#define QUADSPI_MIN_IOMAP		SZ_4M
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+
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 struct fsl_qspi_devtype_data {
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 	unsigned int rxfifo;
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 	unsigned int txfifo;
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@@ -254,6 +256,9 @@ struct fsl_qspi {
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 	void __iomem *iobase;
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 	void __iomem *ahb_addr;
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 	u32 memmap_phy;
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+	u32 memmap_phy_size;
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+	u32 memmap_start;
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+	u32 memmap_len;
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 	struct clk *clk, *clk_en;
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 	struct device *dev;
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 	struct completion c;
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@@ -537,11 +542,34 @@ static void fsl_qspi_select_mem(struct f
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 	fsl_qspi_invalidate(q);
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 }
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-static void fsl_qspi_read_ahb(struct fsl_qspi *q, const struct spi_mem_op *op)
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+static int fsl_qspi_read_ahb(struct fsl_qspi *q, const struct spi_mem_op *op)
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 {
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+	u32 start = op->addr.val + q->selected * q->memmap_phy_size / 4;
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+	u32 len = op->data.nbytes;
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+
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+	/* if necessary, ioremap before AHB read */
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+	if ((!q->ahb_addr) || start < q->memmap_start ||
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+	    start + len > q->memmap_start + q->memmap_len) {
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+		if (q->ahb_addr) {
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+			iounmap(q->ahb_addr);
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+		}
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+
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+		q->memmap_start = start;
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+		q->memmap_len = len > QUADSPI_MIN_IOMAP ?
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+				len : QUADSPI_MIN_IOMAP;
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+
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+		q->ahb_addr = ioremap_wc(q->memmap_phy + q->memmap_start,
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+					 q->memmap_len);
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+		if (!q->ahb_addr) {
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+			dev_err(q->dev, "failed to alloc memory\n");
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+			return -ENOMEM;
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+		}
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+	}
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+
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 	memcpy_fromio(op->data.buf.in,
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-		      q->ahb_addr + q->selected * q->devtype_data->ahb_buf_size,
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-		      op->data.nbytes);
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+		      q->ahb_addr + start - q->memmap_start, len);
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+
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+	return 0;
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 }
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 static void fsl_qspi_fill_txfifo(struct fsl_qspi *q,
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@@ -646,7 +674,7 @@ static int fsl_qspi_exec_op(struct spi_m
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 		addr_offset = q->memmap_phy;
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 	qspi_writel(q,
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-		    q->selected * q->devtype_data->ahb_buf_size + addr_offset,
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+		    q->selected * q->memmap_phy_size / 4 + addr_offset,
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 		    base + QUADSPI_SFAR);
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 	qspi_writel(q, qspi_readl(q, base + QUADSPI_MCR) |
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@@ -665,7 +693,7 @@ static int fsl_qspi_exec_op(struct spi_m
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 	 */
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 	if (op->data.nbytes > (q->devtype_data->rxfifo - 4) &&
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 	    op->data.dir == SPI_MEM_DATA_IN) {
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-		fsl_qspi_read_ahb(q, op);
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+		err = fsl_qspi_read_ahb(q, op);
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 	} else {
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 		qspi_writel(q, QUADSPI_RBCT_WMRK_MASK |
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 			    QUADSPI_RBCT_RXBRD_USEIPS, base + QUADSPI_RBCT);
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@@ -763,16 +791,16 @@ static int fsl_qspi_default_setup(struct
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 	 * In HW there can be a maximum of four chips on two buses with
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 	 * two chip selects on each bus. We use four chip selects in SW
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 	 * to differentiate between the four chips.
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-	 * We use ahb_buf_size for each chip and set SFA1AD, SFA2AD, SFB1AD,
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-	 * SFB2AD accordingly.
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+	 * We divide the total memory region size equally for each chip
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+	 * and set SFA1AD, SFA2AD, SFB1AD, SFB2AD accordingly.
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 	 */
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-	qspi_writel(q, q->devtype_data->ahb_buf_size + addr_offset,
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+	qspi_writel(q, q->memmap_phy_size / 4 + addr_offset,
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 		    base + QUADSPI_SFA1AD);
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-	qspi_writel(q, q->devtype_data->ahb_buf_size * 2 + addr_offset,
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+	qspi_writel(q, q->memmap_phy_size / 4 * 2 + addr_offset,
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 		    base + QUADSPI_SFA2AD);
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-	qspi_writel(q, q->devtype_data->ahb_buf_size * 3 + addr_offset,
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+	qspi_writel(q, q->memmap_phy_size / 4 * 3 + addr_offset,
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 		    base + QUADSPI_SFB1AD);
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-	qspi_writel(q, q->devtype_data->ahb_buf_size * 4 + addr_offset,
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+	qspi_writel(q, q->memmap_phy_size / 4 * 4 + addr_offset,
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 		    base + QUADSPI_SFB2AD);
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 	q->selected = -1;
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@@ -859,13 +887,8 @@ static int fsl_qspi_probe(struct platfor
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 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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 					"QuadSPI-memory");
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-	q->ahb_addr = devm_ioremap_resource(dev, res);
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-	if (IS_ERR(q->ahb_addr)) {
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-		ret = PTR_ERR(q->ahb_addr);
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-		goto err_put_ctrl;
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-	}
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-
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 	q->memmap_phy = res->start;
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+	q->memmap_phy_size = resource_size(res);
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 	/* find the clocks */
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 	q->clk_en = devm_clk_get(dev, "qspi_en");
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@@ -939,6 +962,9 @@ static int fsl_qspi_remove(struct platfo
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 	mutex_destroy(&q->lock);
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+	if (q->ahb_addr)
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+		iounmap(q->ahb_addr);
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+
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 	return 0;
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 }
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