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63066d3006
Reworked: - 0034 patchset update Added: - 080 Add support for pinctrl-msm framework Removed: - 0074-ipq806x-usb-Control-USB-master-reset.patch (we now have a dedicated driver for qcom usb) - 0047-mtd-nand-Create-a-BBT-flag-to-access-bad-block-marke (merged upstream) - 310-msm-adhoc-bus-support (it looks like it was never actually used in any dts) Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> [commit subject and description facelift, SoB fix] Signed-off-by: Petr Štetiar <ynezz@true.cz>
122 lines
3.7 KiB
Diff
122 lines
3.7 KiB
Diff
From: Christian Lamparter <chunkeey@googlemail.com>
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Subject: SoC: add qualcomm syscon
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--- a/drivers/soc/qcom/Makefile
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+++ b/drivers/soc/qcom/Makefile
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@@ -18,6 +18,7 @@ obj-$(CONFIG_QCOM_SMEM_STATE) += smem_st
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obj-$(CONFIG_QCOM_SMP2P) += smp2p.o
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obj-$(CONFIG_QCOM_SMSM) += smsm.o
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obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
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+obj-$(CONFIG_QCOM_TCSR) += qcom_tcsr.o
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obj-$(CONFIG_QCOM_APR) += apr.o
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obj-$(CONFIG_QCOM_LLCC) += llcc-slice.o
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obj-$(CONFIG_QCOM_SDM845_LLCC) += llcc-sdm845.o
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--- a/drivers/soc/qcom/Kconfig
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+++ b/drivers/soc/qcom/Kconfig
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@@ -146,6 +146,13 @@ config QCOM_SMSM
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Say yes here to support the Qualcomm Shared Memory State Machine.
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The state machine is represented by bits in shared memory.
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+config QCOM_TCSR
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+ tristate "QCOM Top Control and Status Registers"
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+ depends on ARCH_QCOM
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+ help
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+ Say y here to enable TCSR support. The TCSR provides control
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+ functions for various peripherals.
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+
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config QCOM_WCNSS_CTRL
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tristate "Qualcomm WCNSS control driver"
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depends on ARCH_QCOM
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--- /dev/null
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+++ b/drivers/soc/qcom/qcom_tcsr.c
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@@ -0,0 +1,64 @@
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+/*
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+ * Copyright (c) 2014, The Linux foundation. All rights reserved.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License rev 2 and
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+ * only rev 2 as published by the free Software foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#include <linux/clk.h>
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+#include <linux/err.h>
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+#include <linux/io.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/of_platform.h>
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+#include <linux/platform_device.h>
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+
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+#define TCSR_USB_PORT_SEL 0xb0
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+
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+static int tcsr_probe(struct platform_device *pdev)
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+{
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+ struct resource *res;
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+ const struct device_node *node = pdev->dev.of_node;
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+ void __iomem *base;
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+ u32 val;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ base = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(base))
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+ return PTR_ERR(base);
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+
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+ if (!of_property_read_u32(node, "qcom,usb-ctrl-select", &val)) {
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+ dev_err(&pdev->dev, "setting usb port select = %d\n", val);
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+ writel(val, base + TCSR_USB_PORT_SEL);
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+ }
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+
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+ return 0;
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+}
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+
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+static const struct of_device_id tcsr_dt_match[] = {
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+ { .compatible = "qcom,tcsr", },
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+ { },
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+};
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+
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+MODULE_DEVICE_TABLE(of, tcsr_dt_match);
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+
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+static struct platform_driver tcsr_driver = {
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+ .driver = {
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+ .name = "tcsr",
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+ .owner = THIS_MODULE,
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+ .of_match_table = tcsr_dt_match,
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+ },
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+ .probe = tcsr_probe,
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+};
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+
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+module_platform_driver(tcsr_driver);
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+
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+MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
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+MODULE_DESCRIPTION("QCOM TCSR driver");
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+MODULE_LICENSE("GPL v2");
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--- /dev/null
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+++ b/include/dt-bindings/soc/qcom,tcsr.h
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@@ -0,0 +1,23 @@
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+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 and
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+ * only version 2 as published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+#ifndef __DT_BINDINGS_QCOM_TCSR_H
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+#define __DT_BINDINGS_QCOM_TCSR_H
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+
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+#define TCSR_USB_SELECT_USB3_P0 0x1
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+#define TCSR_USB_SELECT_USB3_P1 0x2
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+#define TCSR_USB_SELECT_USB3_DUAL 0x3
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+
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+/* TCSR A/B REG */
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+#define IPQ806X_TCSR_REG_A_ADM_CRCI_MUX_SEL 0
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+#define IPQ806X_TCSR_REG_B_ADM_CRCI_MUX_SEL 1
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+
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+#endif
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