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				git://git.openwrt.org/openwrt/openwrt.git
				synced 2025-10-31 14:04:26 -04:00 
			
		
		
		
	Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Tim Harvey <tharvey@gateworks.com> [fixes]
		
			
				
	
	
		
			52 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			52 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| --- a/drivers/pci/Kconfig
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| +++ b/drivers/pci/Kconfig
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| @@ -71,6 +71,12 @@ config XEN_PCIDEV_FRONTEND
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|            The PCI device frontend driver allows the kernel to import arbitrary
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|            PCI devices from a PCI backend to support PCI driver domains.
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|  
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| +config PCI_DISABLE_COMMON_QUIRKS
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| +	bool "PCI disable common quirks"
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| +	depends on PCI
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| +	help
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| +	  If you don't know what to do here, say N.
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| +
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|  config HT_IRQ
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|  	bool "Interrupts on hypertransport devices"
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|  	default y
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| --- a/drivers/pci/quirks.c
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| +++ b/drivers/pci/quirks.c
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| @@ -41,6 +41,7 @@ static void quirk_mmio_always_on(struct
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|  DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
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|  				PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
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|  
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| +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
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|  /* The Mellanox Tavor device gives false positive parity errors
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|   * Mark this device with a broken_parity_status, to allow
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|   * PCI scanning code to "skip" this now blacklisted device.
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| @@ -3015,6 +3016,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
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|  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
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|  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
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|  
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| +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
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|  
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|  /*
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|   * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.  To
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| @@ -3071,6 +3073,8 @@ static void fixup_debug_report(struct pc
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|  	}
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|  }
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|  
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| +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
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| +
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|  /*
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|   * Some BIOS implementations leave the Intel GPU interrupts enabled,
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|   * even though no one is handling them (f.e. i915 driver is never loaded).
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| @@ -3105,6 +3109,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
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|  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
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|  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
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|  
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| +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
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| +
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|  /*
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|   * PCI devices which are on Intel chips can skip the 10ms delay
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|   * before entering D3 mode.
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