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				git://git.openwrt.org/openwrt/openwrt.git
				synced 2025-11-03 22:44:27 -05:00 
			
		
		
		
	
		
			
				
	
	
		
			246 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			246 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
--- a/drivers/net/ethernet/broadcom/bgmac.c
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+++ b/drivers/net/ethernet/broadcom/bgmac.c
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@@ -301,7 +301,7 @@ static int bgmac_dma_rx_read(struct bgma
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 			bgmac_err(bgmac, "Found poisoned packet at slot %d, DMA issue!\n",
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 				  ring->start);
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 		} else {
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-			new_skb = netdev_alloc_skb(bgmac->net_dev, len);
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+			new_skb = netdev_alloc_skb_ip_align(bgmac->net_dev, len);
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 			if (new_skb) {
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 				skb_put(new_skb, len);
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 				skb_copy_from_linear_data_offset(skb, BGMAC_RX_FRAME_OFFSET,
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@@ -436,6 +436,8 @@ static int bgmac_dma_alloc(struct bgmac
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 	}
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 	for (i = 0; i < BGMAC_MAX_RX_RINGS; i++) {
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+		int j;
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+
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 		ring = &bgmac->rx_ring[i];
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 		ring->num_slots = BGMAC_RX_RING_SLOTS;
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 		ring->mmio_base = ring_base[i];
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@@ -458,8 +460,8 @@ static int bgmac_dma_alloc(struct bgmac
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 			bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
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 		/* Alloc RX slots */
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-		for (i = 0; i < ring->num_slots; i++) {
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-			err = bgmac_dma_rx_skb_for_slot(bgmac, &ring->slots[i]);
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+		for (j = 0; j < ring->num_slots; j++) {
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+			err = bgmac_dma_rx_skb_for_slot(bgmac, &ring->slots[j]);
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 			if (err) {
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 				bgmac_err(bgmac, "Can't allocate skb for slot in RX ring\n");
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 				goto err_dma_free;
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@@ -496,6 +498,8 @@ static void bgmac_dma_init(struct bgmac
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 	}
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 	for (i = 0; i < BGMAC_MAX_RX_RINGS; i++) {
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+		int j;
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+
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 		ring = &bgmac->rx_ring[i];
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 		/* We don't implement unaligned addressing, so enable first */
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@@ -505,11 +509,11 @@ static void bgmac_dma_init(struct bgmac
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 		bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGHI,
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 			    upper_32_bits(ring->dma_base));
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-		for (i = 0, dma_desc = ring->cpu_base; i < ring->num_slots;
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-		     i++, dma_desc++) {
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+		for (j = 0, dma_desc = ring->cpu_base; j < ring->num_slots;
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+		     j++, dma_desc++) {
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 			ctl0 = ctl1 = 0;
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-			if (i == ring->num_slots - 1)
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+			if (j == ring->num_slots - 1)
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 				ctl0 |= BGMAC_DESC_CTL0_EOT;
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 			ctl1 |= BGMAC_RX_BUF_SIZE & BGMAC_DESC_CTL1_LEN;
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 			/* Is there any BGMAC device that requires extension? */
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@@ -517,8 +521,8 @@ static void bgmac_dma_init(struct bgmac
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 			 * B43_DMA64_DCTL1_ADDREXT_MASK;
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 			 */
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-			dma_desc->addr_low = cpu_to_le32(lower_32_bits(ring->slots[i].dma_addr));
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-			dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[i].dma_addr));
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+			dma_desc->addr_low = cpu_to_le32(lower_32_bits(ring->slots[j].dma_addr));
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+			dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[j].dma_addr));
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 			dma_desc->ctl0 = cpu_to_le32(ctl0);
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 			dma_desc->ctl1 = cpu_to_le32(ctl1);
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 		}
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@@ -535,7 +539,7 @@ static void bgmac_dma_init(struct bgmac
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  * PHY ops
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  **************************************************/
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-u16 bgmac_phy_read(struct bgmac *bgmac, u8 phyaddr, u8 reg)
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+static u16 bgmac_phy_read(struct bgmac *bgmac, u8 phyaddr, u8 reg)
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 {
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 	struct bcma_device *core;
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 	u16 phy_access_addr;
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@@ -584,7 +588,7 @@ u16 bgmac_phy_read(struct bgmac *bgmac,
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 }
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 /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphywr */
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-void bgmac_phy_write(struct bgmac *bgmac, u8 phyaddr, u8 reg, u16 value)
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+static int bgmac_phy_write(struct bgmac *bgmac, u8 phyaddr, u8 reg, u16 value)
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 {
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 	struct bcma_device *core;
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 	u16 phy_access_addr;
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@@ -617,9 +621,13 @@ void bgmac_phy_write(struct bgmac *bgmac
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 	tmp |= value;
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 	bcma_write32(core, phy_access_addr, tmp);
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-	if (!bgmac_wait_value(core, phy_access_addr, BGMAC_PA_START, 0, 1000))
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+	if (!bgmac_wait_value(core, phy_access_addr, BGMAC_PA_START, 0, 1000)) {
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 		bgmac_err(bgmac, "Writing to PHY %d register 0x%X failed\n",
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 			  phyaddr, reg);
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+		return -ETIMEDOUT;
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+	}
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+
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+	return 0;
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 }
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 /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyforce */
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@@ -761,6 +769,26 @@ static void bgmac_cmdcfg_maskset(struct
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 	udelay(2);
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 }
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+static void bgmac_write_mac_address(struct bgmac *bgmac, u8 *addr)
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+{
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+	u32 tmp;
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+
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+	tmp = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
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+	bgmac_write(bgmac, BGMAC_MACADDR_HIGH, tmp);
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+	tmp = (addr[4] << 8) | addr[5];
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+	bgmac_write(bgmac, BGMAC_MACADDR_LOW, tmp);
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+}
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+
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+static void bgmac_set_rx_mode(struct net_device *net_dev)
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+{
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+	struct bgmac *bgmac = netdev_priv(net_dev);
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+
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+	if (net_dev->flags & IFF_PROMISC)
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+		bgmac_cmdcfg_maskset(bgmac, ~0, BGMAC_CMDCFG_PROM, true);
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+	else
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+		bgmac_cmdcfg_maskset(bgmac, ~BGMAC_CMDCFG_PROM, 0, true);
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+}
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+
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 #if 0 /* We don't use that regs yet */
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 static void bgmac_chip_stats_update(struct bgmac *bgmac)
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 {
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@@ -889,8 +917,10 @@ static void bgmac_chip_reset(struct bgma
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 			sw_type = et_swtype;
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 		} else if (ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == 9) {
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 			sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII;
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-		} else if (0) {
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-			/* TODO */
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+		} else if ((ci->id != BCMA_CHIP_ID_BCM53572 && ci->pkg == 10) ||
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+			   (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == 9)) {
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+			sw_type = BGMAC_CHIPCTL_1_IF_TYPE_RGMII |
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+				  BGMAC_CHIPCTL_1_SW_TYPE_RGMII;
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 		}
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 		bcma_chipco_chipctl_maskset(cc, 1,
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 					    ~(BGMAC_CHIPCTL_1_IF_TYPE_MASK |
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@@ -948,6 +978,7 @@ static void bgmac_chip_intrs_on(struct b
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 static void bgmac_chip_intrs_off(struct bgmac *bgmac)
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 {
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 	bgmac_write(bgmac, BGMAC_INT_MASK, 0);
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+	bgmac_read(bgmac, BGMAC_INT_MASK);
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 }
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 /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/gmac_enable */
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@@ -1004,8 +1035,6 @@ static void bgmac_enable(struct bgmac *b
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 static void bgmac_chip_init(struct bgmac *bgmac, bool full_init)
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 {
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 	struct bgmac_dma_ring *ring;
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-	u8 *mac = bgmac->net_dev->dev_addr;
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-	u32 tmp;
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 	int i;
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 	/* 1 interrupt per received frame */
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@@ -1014,21 +1043,14 @@ static void bgmac_chip_init(struct bgmac
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 	/* Enable 802.3x tx flow control (honor received PAUSE frames) */
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 	bgmac_cmdcfg_maskset(bgmac, ~BGMAC_CMDCFG_RPI, 0, true);
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-	if (bgmac->net_dev->flags & IFF_PROMISC)
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-		bgmac_cmdcfg_maskset(bgmac, ~0, BGMAC_CMDCFG_PROM, false);
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-	else
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-		bgmac_cmdcfg_maskset(bgmac, ~BGMAC_CMDCFG_PROM, 0, false);
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+	bgmac_set_rx_mode(bgmac->net_dev);
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-	/* Set MAC addr */
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-	tmp = (mac[0] << 24) | (mac[1] << 16) | (mac[2] << 8) | mac[3];
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-	bgmac_write(bgmac, BGMAC_MACADDR_HIGH, tmp);
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-	tmp = (mac[4] << 8) | mac[5];
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-	bgmac_write(bgmac, BGMAC_MACADDR_LOW, tmp);
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+	bgmac_write_mac_address(bgmac, bgmac->net_dev->dev_addr);
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 	if (bgmac->loopback)
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-		bgmac_cmdcfg_maskset(bgmac, ~0, BGMAC_CMDCFG_ML, true);
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+		bgmac_cmdcfg_maskset(bgmac, ~0, BGMAC_CMDCFG_ML, false);
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 	else
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-		bgmac_cmdcfg_maskset(bgmac, ~BGMAC_CMDCFG_ML, 0, true);
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+		bgmac_cmdcfg_maskset(bgmac, ~BGMAC_CMDCFG_ML, 0, false);
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 	bgmac_write(bgmac, BGMAC_RXMAX_LENGTH, 32 + ETHER_MAX_LEN);
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@@ -1160,6 +1182,19 @@ static netdev_tx_t bgmac_start_xmit(stru
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 	return bgmac_dma_tx_add(bgmac, ring, skb);
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 }
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+static int bgmac_set_mac_address(struct net_device *net_dev, void *addr)
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+{
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+	struct bgmac *bgmac = netdev_priv(net_dev);
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+	int ret;
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+
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+	ret = eth_prepare_mac_addr_change(net_dev, addr);
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+	if (ret < 0)
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+		return ret;
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+	bgmac_write_mac_address(bgmac, (u8 *)addr);
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+	eth_commit_mac_addr_change(net_dev, addr);
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+	return 0;
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+}
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+
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 static int bgmac_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
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 {
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 	struct bgmac *bgmac = netdev_priv(net_dev);
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@@ -1190,7 +1225,9 @@ static const struct net_device_ops bgmac
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 	.ndo_open		= bgmac_open,
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 	.ndo_stop		= bgmac_stop,
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 	.ndo_start_xmit		= bgmac_start_xmit,
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-	.ndo_set_mac_address	= eth_mac_addr, /* generic, sets dev_addr */
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+	.ndo_set_rx_mode	= bgmac_set_rx_mode,
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+	.ndo_set_mac_address	= bgmac_set_mac_address,
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+	.ndo_validate_addr	= eth_validate_addr,
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 	.ndo_do_ioctl           = bgmac_ioctl,
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 };
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@@ -1290,6 +1327,12 @@ static int bgmac_probe(struct bcma_devic
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 		return -ENOTSUPP;
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 	}
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+	if (!is_valid_ether_addr(mac)) {
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+		dev_err(&core->dev, "Invalid MAC addr: %pM\n", mac);
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+		eth_random_addr(mac);
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+		dev_warn(&core->dev, "Using random MAC: %pM\n", mac);
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+	}
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+
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 	/* Allocation and references */
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 	net_dev = alloc_etherdev(sizeof(*bgmac));
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 	if (!net_dev)
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--- a/drivers/net/ethernet/broadcom/bgmac.h
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+++ b/drivers/net/ethernet/broadcom/bgmac.h
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@@ -339,7 +339,7 @@
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 #define BGMAC_CHIPCTL_1_SW_TYPE_EPHY		0x00000000
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 #define BGMAC_CHIPCTL_1_SW_TYPE_EPHYMII		0x00000040
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 #define BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII	0x00000080
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-#define BGMAC_CHIPCTL_1_SW_TYPE_RGMI		0x000000C0
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+#define BGMAC_CHIPCTL_1_SW_TYPE_RGMII		0x000000C0
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 #define BGMAC_CHIPCTL_1_RXC_DLL_BYPASS		0x00010000
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 #define BGMAC_SPEED_10				0x0001
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@@ -450,7 +450,4 @@ static inline void bgmac_set(struct bgma
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 	bgmac_maskset(bgmac, offset, ~0, set);
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 }
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-u16 bgmac_phy_read(struct bgmac *bgmac, u8 phyaddr, u8 reg);
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-void bgmac_phy_write(struct bgmac *bgmac, u8 phyaddr, u8 reg, u16 value);
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-
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 #endif /* _BGMAC_H */
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