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f4e6418a32
The ETH_RXDV_DELAY (17:16) and ETH_RXD_DELAY (15:14) are currently not cleared by the function ath79_setup_ar934x_eth_cfg. Clearing these in the ath79_setup_ar934x_eth_cfg may cause problems on some hardware because they rely on the preset value by the bootloader. Instead another function is introduced which also works on ETH_CFG on AR934x. It can be used to safely clear and set ETH_RXDV_DELAY and ETH_RXD_DELAY on machines which require special settings. Signed-off-by: Sven Eckelmann <sven@open-mesh.com> SVN-Revision: 45523
54 lines
1.7 KiB
C
54 lines
1.7 KiB
C
/*
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* Atheros AR71xx SoC device definitions
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*
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* Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#ifndef _ATH79_DEV_ETH_H
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#define _ATH79_DEV_ETH_H
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#include <asm/mach-ath79/ag71xx_platform.h>
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struct platform_device;
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extern unsigned char ath79_mac_base[] __initdata;
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void ath79_parse_ascii_mac(char *mac_str, u8 *mac);
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void ath79_init_mac(unsigned char *dst, const unsigned char *src,
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int offset);
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void ath79_init_local_mac(unsigned char *dst, const unsigned char *src);
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struct ath79_eth_pll_data {
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u32 pll_10;
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u32 pll_100;
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u32 pll_1000;
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};
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extern struct ath79_eth_pll_data ath79_eth0_pll_data;
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extern struct ath79_eth_pll_data ath79_eth1_pll_data;
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extern struct ag71xx_platform_data ath79_eth0_data;
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extern struct ag71xx_platform_data ath79_eth1_data;
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extern struct platform_device ath79_eth0_device;
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extern struct platform_device ath79_eth1_device;
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void ath79_register_eth(unsigned int id);
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extern struct ag71xx_switch_platform_data ath79_switch_data;
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extern struct ag71xx_mdio_platform_data ath79_mdio0_data;
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extern struct ag71xx_mdio_platform_data ath79_mdio1_data;
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extern struct platform_device ath79_mdio0_device;
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extern struct platform_device ath79_mdio1_device;
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void ath79_register_mdio(unsigned int id, u32 phy_mask);
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void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio);
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void ath79_setup_ar934x_eth_cfg(u32 mask);
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void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv);
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void ath79_setup_qca955x_eth_cfg(u32 mask);
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#endif /* _ATH79_DEV_ETH_H */
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