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			9.1 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			371 lines
		
	
	
		
			9.1 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From 225f36695bb07dad9510f9affd79e63f1a44a195 Mon Sep 17 00:00:00 2001
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| From: John Crispin <blogic@openwrt.org>
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| Date: Sun, 27 Jul 2014 09:52:56 +0100
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| Subject: [PATCH 52/57] i2c: MIPS: adds ralink I2C driver
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| 
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| Signed-off-by: John Crispin <blogic@openwrt.org>
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| ---
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|  .../devicetree/bindings/i2c/i2c-ralink.txt         |   27 ++
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|  drivers/i2c/busses/Kconfig                         |    4 +
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|  drivers/i2c/busses/Makefile                        |    1 +
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|  drivers/i2c/busses/i2c-ralink.c                    |  274 ++++++++++++++++++++
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|  4 files changed, 306 insertions(+)
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|  create mode 100644 Documentation/devicetree/bindings/i2c/i2c-ralink.txt
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|  create mode 100644 drivers/i2c/busses/i2c-ralink.c
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| 
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| --- /dev/null
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| +++ b/Documentation/devicetree/bindings/i2c/i2c-ralink.txt
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| @@ -0,0 +1,27 @@
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| +I2C for Ralink platforms
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| +
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| +Required properties :
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| +- compatible : Must be "link,rt3052-i2c"
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| +- reg: physical base address of the controller and length of memory mapped
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| +     region.
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| +- #address-cells = <1>;
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| +- #size-cells = <0>;
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| +
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| +Optional properties:
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| +- Child nodes conforming to i2c bus binding
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| +
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| +Example :
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| +
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| +palmbus@10000000 {
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| +	i2c@900 {
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| +		compatible = "link,rt3052-i2c";
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| +		reg = <0x900 0x100>;
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| +		#address-cells = <1>;
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| +		#size-cells = <0>;
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| +
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| +		hwmon@4b {
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| +			compatible = "national,lm92";
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| +			reg = <0x4b>;
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| +		};
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| +	};
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| +};
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| --- a/drivers/i2c/busses/Kconfig
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| +++ b/drivers/i2c/busses/Kconfig
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| @@ -659,6 +659,10 @@ config I2C_RIIC
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|  	  This driver can also be built as a module.  If so, the module
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|  	  will be called i2c-riic.
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|  
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| +config I2C_RALINK
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| +	tristate "Ralink I2C Controller"
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| +	select OF_I2C
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| +
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|  config HAVE_S3C2410_I2C
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|  	bool
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|  	help
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| --- a/drivers/i2c/busses/Makefile
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| +++ b/drivers/i2c/busses/Makefile
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| @@ -63,6 +63,7 @@ obj-$(CONFIG_I2C_PNX)		+= i2c-pnx.o
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|  obj-$(CONFIG_I2C_PUV3)		+= i2c-puv3.o
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|  obj-$(CONFIG_I2C_PXA)		+= i2c-pxa.o
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|  obj-$(CONFIG_I2C_PXA_PCI)	+= i2c-pxa-pci.o
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| +obj-$(CONFIG_I2C_RALINK)	+= i2c-ralink.o
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|  obj-$(CONFIG_I2C_RIIC)		+= i2c-riic.o
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|  obj-$(CONFIG_I2C_S3C2410)	+= i2c-s3c2410.o
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|  obj-$(CONFIG_I2C_S6000)		+= i2c-s6000.o
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| --- /dev/null
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| +++ b/drivers/i2c/busses/i2c-ralink.c
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| @@ -0,0 +1,299 @@
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| +/*
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| + * drivers/i2c/busses/i2c-ralink.c
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| + *
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| + * Copyright (C) 2013 Steven Liu <steven_liu@mediatek.com>
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| + *
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| + * Improve driver for i2cdetect from i2c-tools to detect i2c devices on the bus.
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| + * (C) 2014 Sittisak <sittisaks@hotmail.com>
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| + *
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| + * This software is licensed under the terms of the GNU General Public
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| + * License version 2, as published by the Free Software Foundation, and
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| + * may be copied, distributed, and modified under those terms.
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| + *
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| + * This program is distributed in the hope that it will be useful,
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| + * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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| + * GNU General Public License for more details.
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| + *
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| + */
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| +
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| +#include <linux/interrupt.h>
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| +#include <linux/kernel.h>
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| +#include <linux/module.h>
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| +#include <linux/reset.h>
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| +#include <linux/delay.h>
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| +#include <linux/slab.h>
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| +#include <linux/init.h>
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| +#include <linux/errno.h>
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| +#include <linux/platform_device.h>
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| +#include <linux/i2c.h>
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| +#include <linux/io.h>
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| +#include <linux/err.h>
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| +
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| +#include <asm/mach-ralink/ralink_regs.h>
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| +
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| +#define REG_CONFIG_REG		0x00
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| +#define REG_CLKDIV_REG		0x04
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| +#define REG_DEVADDR_REG		0x08
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| +#define REG_ADDR_REG		0x0C
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| +#define REG_DATAOUT_REG		0x10
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| +#define REG_DATAIN_REG		0x14
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| +#define REG_STATUS_REG		0x18
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| +#define REG_STARTXFR_REG	0x1C
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| +#define REG_BYTECNT_REG		0x20
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| +
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| +#define I2C_STARTERR		BIT(4)
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| +#define I2C_ACKERR		BIT(3)
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| +#define I2C_DATARDY		BIT(2)
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| +#define I2C_SDOEMPTY		BIT(1)
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| +#define I2C_BUSY		BIT(0)
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| +
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| +#define I2C_DEVADLEN_7		(6 << 2)
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| +#define I2C_ADDRDIS		BIT(1)
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| +
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| +#define I2C_RETRY		0x1000
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| +
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| +#define CLKDIV_VALUE		200 // clock rate is 40M, 40M / (200*2) = 100k (standard i2c bus rate).
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| +//#define CLKDIV_VALUE		50 // clock rate is 40M, 40M / (50*2) = 400k (fast i2c bus rate).
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| +
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| +#define READ_CMD		0x01
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| +#define WRITE_CMD		0x00
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| +#define READ_BLOCK              64
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| +
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| +static void __iomem *membase;
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| +static struct i2c_adapter *adapter;
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| +
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| +static void rt_i2c_w32(u32 val, unsigned reg)
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| +{
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| +	iowrite32(val, membase + reg);
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| +}
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| +
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| +static u32 rt_i2c_r32(unsigned reg)
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| +{
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| +	return ioread32(membase + reg);
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| +}
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| +
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| +static inline int rt_i2c_get_ack(void)
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| +{
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| +        return (rt_i2c_r32(REG_STATUS_REG) & I2C_ACKERR) ? -EIO : 0;
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| +}
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| +
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| +static inline int rt_i2c_wait_rx_done(void)
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| +{
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| +	int retries = I2C_RETRY;
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| +
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| +	do {
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| +		if (!retries--)
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| +			break;
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| +	} while(!(rt_i2c_r32(REG_STATUS_REG) & I2C_DATARDY));
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| +
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| +	return (retries < 0) ? -ETIMEDOUT : 0;
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| +}
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| +
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| +static inline int rt_i2c_wait_idle(void)
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| +{
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| +	int retries = I2C_RETRY;
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| +
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| +	do {
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| +		if (!retries--)
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| +			break;
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| +	} while(rt_i2c_r32(REG_STATUS_REG) & I2C_BUSY);
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| +
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| +	return (retries < 0);
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| +}
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| +
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| +static inline int rt_i2c_wait_tx_done(void)
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| +{
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| +	int retries = I2C_RETRY;
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| +
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| +	do {
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| +		if (!retries--)
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| +			break;
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| +	} while(!(rt_i2c_r32(REG_STATUS_REG) & I2C_SDOEMPTY));
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| +
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| +	return (retries < 0) ? -ETIMEDOUT : 0;
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| +}
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| +
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| +static int rt_i2c_handle_msg(struct i2c_adapter *a, struct i2c_msg* msg)
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| +{
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| +	int i = 0, j = 0, pos = 0;
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| +	int nblock = msg->len / READ_BLOCK;
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| +        int rem = msg->len % READ_BLOCK;
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| +	int ret = 0;
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| +
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| +	if (msg->flags & I2C_M_TEN) {
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| +		printk("10 bits addr not supported\n");
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| +		return -EINVAL;
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| +	}
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| +
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| +	if (msg->flags & I2C_M_RD) {
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| +		for (i = 0; i < nblock; i++) {
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| +	                if (rt_i2c_wait_idle()) {
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| +		            printk("i2c-read line busy\n");
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| +				return -ETIMEDOUT;
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| +			}
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| +			rt_i2c_w32(READ_BLOCK - 1, REG_BYTECNT_REG);
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| +			rt_i2c_w32(READ_CMD, REG_STARTXFR_REG);
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| +			for (j = 0; j < READ_BLOCK; j++) {
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| +				if (rt_i2c_wait_rx_done() < 0)
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| +					ret = rt_i2c_wait_rx_done();
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| +                                if (rt_i2c_get_ack() < 0)
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| +					ret = rt_i2c_get_ack();
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| +				msg->buf[pos++] = rt_i2c_r32(REG_DATAIN_REG);
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| +			}
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| +		}
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| +
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| +		if (rt_i2c_wait_idle()) {
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| +			printk("i2c-read line busy\n");
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| +			return -ETIMEDOUT;
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| +		}
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| +		if (rem) {
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| +			rt_i2c_w32(rem - 1, REG_BYTECNT_REG);
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| +			rt_i2c_w32(READ_CMD, REG_STARTXFR_REG);
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| +		}
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| +		for (i = 0; i < rem; i++) {
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| +			if (rt_i2c_wait_rx_done() < 0)
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| +				ret = rt_i2c_wait_rx_done();
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| +                        if (rt_i2c_get_ack() < 0)
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| +				ret = rt_i2c_get_ack();
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| +
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| +			msg->buf[pos++] = rt_i2c_r32(REG_DATAIN_REG);
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| +		}
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| +	} else {
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| +		if (rt_i2c_wait_idle()) {
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| +			printk("i2c-write line busy\n");
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| +			return -ETIMEDOUT;
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| +		}
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| +		rt_i2c_w32(msg->len - 1, REG_BYTECNT_REG);
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| +		for (i = 0; i < msg->len; i++) {
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| +			rt_i2c_w32(msg->buf[i], REG_DATAOUT_REG);
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| +			rt_i2c_w32(WRITE_CMD, REG_STARTXFR_REG);
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| +
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| +			if (rt_i2c_wait_tx_done() < 0)
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| +				ret = rt_i2c_wait_tx_done();
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| +                        if (rt_i2c_get_ack() < 0)
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| +				ret = rt_i2c_get_ack();
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| +		}
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| +	}
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| +
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| +	return ret;
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| +}
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| +
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| +static int rt_i2c_master_xfer(struct i2c_adapter *a, struct i2c_msg *m, int n)
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| +{
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| +	int i = 0;
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| +	int ret = 0;
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| +
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| +	if (rt_i2c_wait_idle()) {
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| +		printk("i2c-master_xfer line busy\n");
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| +		return -ETIMEDOUT;
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| +	}
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| +
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| +	device_reset(a->dev.parent);
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| +
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| +	rt_i2c_w32(m->addr, REG_DEVADDR_REG);
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| +	rt_i2c_w32(I2C_DEVADLEN_7 | I2C_ADDRDIS, REG_CONFIG_REG);
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| +	rt_i2c_w32(CLKDIV_VALUE, REG_CLKDIV_REG);
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| +
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| +	for (i = 0; i < n && !ret; i++) {
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| +		ret = rt_i2c_handle_msg(a, &m[i]);
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| +
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| +		if (ret < 0) {
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| +			return ret;
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| +		}
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| +	}
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| +
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| +	return n;
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| +}
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| +
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| +static u32 rt_i2c_func(struct i2c_adapter *a)
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| +{
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| +	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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| +}
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| +
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| +static const struct i2c_algorithm rt_i2c_algo = {
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| +	.master_xfer	= rt_i2c_master_xfer,
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| +	.functionality	= rt_i2c_func,
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| +};
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| +
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| +static int rt_i2c_probe(struct platform_device *pdev)
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| +{
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| +	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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| +	int ret;
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| +
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| +	if (!res) {
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| +		dev_err(&pdev->dev, "no memory resource found\n");
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| +		return -ENODEV;
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| +	}
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| +
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| +	adapter = devm_kzalloc(&pdev->dev, sizeof(struct i2c_adapter), GFP_KERNEL);
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| +	if (!adapter) {
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| +		dev_err(&pdev->dev, "failed to allocate i2c_adapter\n");
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| +		return -ENOMEM;
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| +	}
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| +
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| +	membase = devm_request_and_ioremap(&pdev->dev, res);
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| +	if (IS_ERR(membase))
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| +		return PTR_ERR(membase);
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| +
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| +	strlcpy(adapter->name, dev_name(&pdev->dev), sizeof(adapter->name));
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| +	adapter->owner = THIS_MODULE;
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| +	adapter->nr = pdev->id;
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| +	adapter->timeout = HZ;
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| +	adapter->algo = &rt_i2c_algo;
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| +	adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
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| +	adapter->dev.parent = &pdev->dev;
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| +	adapter->dev.of_node = pdev->dev.of_node;
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| +
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| +	ret = i2c_add_numbered_adapter(adapter);
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| +	if (ret)
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| +		return ret;
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| +
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| +	platform_set_drvdata(pdev, adapter);
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| +
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| +	dev_info(&pdev->dev, "loaded\n");
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| +
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| +	return 0;
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| +}
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| +
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| +static int rt_i2c_remove(struct platform_device *pdev)
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| +{
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| +	platform_set_drvdata(pdev, NULL);
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| +
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| +	return 0;
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| +}
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| +
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| +static const struct of_device_id i2c_rt_dt_ids[] = {
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| +	{ .compatible = "ralink,rt2880-i2c", },
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| +	{ /* sentinel */ }
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| +};
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| +
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| +MODULE_DEVICE_TABLE(of, i2c_rt_dt_ids);
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| +
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| +static struct platform_driver rt_i2c_driver = {
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| +	.probe		= rt_i2c_probe,
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| +	.remove		= rt_i2c_remove,
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| +	.driver		= {
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| +		.owner	= THIS_MODULE,
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| +		.name	= "i2c-ralink",
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| +		.of_match_table = i2c_rt_dt_ids,
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| +	},
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| +};
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| +
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| +static int __init i2c_rt_init (void)
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| +{
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| +	return platform_driver_register(&rt_i2c_driver);
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| +}
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| +subsys_initcall(i2c_rt_init);
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| +
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| +static void __exit i2c_rt_exit (void)
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| +{
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| +	platform_driver_unregister(&rt_i2c_driver);
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| +}
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| +
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| +module_exit (i2c_rt_exit);
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| +
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| +MODULE_AUTHOR("Steven Liu <steven_liu@mediatek.com>");
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| +MODULE_DESCRIPTION("Ralink I2c host driver");
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| +MODULE_LICENSE("GPL");
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| +MODULE_ALIAS("platform:Ralink-I2C");
 |