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	Targets were build tested and patches are refreshed. Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 42463
		
			
				
	
	
		
			146 lines
		
	
	
		
			4.1 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			146 lines
		
	
	
		
			4.1 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From a2f0fc20ea49e5dbbdbb21444683ea760fbdd38f Mon Sep 17 00:00:00 2001
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| From: Andy Gross <agross@codeaurora.org>
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| Date: Thu, 24 Apr 2014 11:31:21 -0500
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| Subject: [PATCH 084/182] soc: qcom: Add GSBI driver
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| 
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| The GSBI (General Serial Bus Interface) driver controls the overarching
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| configuration of the shared serial bus infrastructure on APQ8064, IPQ8064, and
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| earlier QCOM processors.  The GSBI supports UART, I2C, SPI, and UIM
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| functionality in various combinations.
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| 
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| Signed-off-by: Andy Gross <agross@codeaurora.org>
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| Signed-off-by: Kumar Gala <galak@codeaurora.org>
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| ---
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|  drivers/soc/Kconfig          |    2 +
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|  drivers/soc/Makefile         |    5 +++
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|  drivers/soc/qcom/Kconfig     |   11 ++++++
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|  drivers/soc/qcom/Makefile    |    1 +
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|  drivers/soc/qcom/qcom_gsbi.c |   84 ++++++++++++++++++++++++++++++++++++++++++
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|  5 files changed, 103 insertions(+)
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|  create mode 100644 drivers/soc/Makefile
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|  create mode 100644 drivers/soc/qcom/Kconfig
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|  create mode 100644 drivers/soc/qcom/Makefile
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|  create mode 100644 drivers/soc/qcom/qcom_gsbi.c
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| 
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| --- a/drivers/soc/Kconfig
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| +++ b/drivers/soc/Kconfig
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| @@ -1,3 +1,5 @@
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|  menu "SOC (System On Chip) specific Drivers"
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|  
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| +source "drivers/soc/qcom/Kconfig"
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| +
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|  endmenu
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| --- /dev/null
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| +++ b/drivers/soc/Makefile
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| @@ -0,0 +1,5 @@
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| +#
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| +# Makefile for the Linux Kernel SOC specific device drivers.
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| +#
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| +
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| +obj-$(CONFIG_ARCH_QCOM)		+= qcom/
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| --- /dev/null
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| +++ b/drivers/soc/qcom/Kconfig
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| @@ -0,0 +1,11 @@
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| +#
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| +# QCOM Soc drivers
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| +#
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| +config QCOM_GSBI
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| +        tristate "QCOM General Serial Bus Interface"
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| +        depends on ARCH_QCOM
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| +        help
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| +          Say y here to enable GSBI support.  The GSBI provides control
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| +          functions for connecting the underlying serial UART, SPI, and I2C
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| +          devices to the output pins.
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| +
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| --- /dev/null
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| +++ b/drivers/soc/qcom/Makefile
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| @@ -0,0 +1 @@
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| +obj-$(CONFIG_QCOM_GSBI)	+=	qcom_gsbi.o
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| --- /dev/null
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| +++ b/drivers/soc/qcom/qcom_gsbi.c
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| @@ -0,0 +1,84 @@
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| +/*
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| + * Copyright (c) 2014, The Linux foundation. All rights reserved.
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| + *
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| + * This program is free software; you can redistribute it and/or modify
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| + * it under the terms of the GNU General Public License rev 2 and
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| + * only rev 2 as published by the free Software foundation.
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| + *
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| + * This program is distributed in the hope that it will be useful,
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| + * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| + * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE.  See the
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| + * GNU General Public License for more details.
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| + */
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| +
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| +#include <linux/clk.h>
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| +#include <linux/err.h>
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| +#include <linux/io.h>
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| +#include <linux/module.h>
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| +#include <linux/of.h>
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| +#include <linux/of_platform.h>
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| +#include <linux/platform_device.h>
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| +
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| +#define GSBI_CTRL_REG		0x0000
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| +#define GSBI_PROTOCOL_SHIFT	4
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| +
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| +static int gsbi_probe(struct platform_device *pdev)
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| +{
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| +	struct device_node *node = pdev->dev.of_node;
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| +	struct resource *res;
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| +	void __iomem *base;
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| +	struct clk *hclk;
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| +	u32 mode, crci = 0;
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| +
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| +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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| +	base = devm_ioremap_resource(&pdev->dev, res);
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| +	if (IS_ERR(base))
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| +		return PTR_ERR(base);
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| +
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| +	if (of_property_read_u32(node, "qcom,mode", &mode)) {
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| +		dev_err(&pdev->dev, "missing mode configuration\n");
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| +		return -EINVAL;
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| +	}
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| +
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| +	/* not required, so default to 0 if not present */
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| +	of_property_read_u32(node, "qcom,crci", &crci);
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| +
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| +	dev_info(&pdev->dev, "GSBI port protocol: %d crci: %d\n", mode, crci);
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| +
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| +	hclk = devm_clk_get(&pdev->dev, "iface");
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| +	if (IS_ERR(hclk))
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| +		return PTR_ERR(hclk);
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| +
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| +	clk_prepare_enable(hclk);
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| +
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| +	writel_relaxed((mode << GSBI_PROTOCOL_SHIFT) | crci,
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| +				base + GSBI_CTRL_REG);
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| +
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| +	/* make sure the gsbi control write is not reordered */
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| +	wmb();
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| +
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| +	clk_disable_unprepare(hclk);
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| +
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| +	return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
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| +}
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| +
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| +static const struct of_device_id gsbi_dt_match[] = {
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| +	{ .compatible = "qcom,gsbi-v1.0.0", },
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| +};
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| +
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| +MODULE_DEVICE_TABLE(of, gsbi_dt_match);
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| +
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| +static struct platform_driver gsbi_driver = {
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| +	.driver = {
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| +		.name		= "gsbi",
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| +		.owner		= THIS_MODULE,
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| +		.of_match_table	= gsbi_dt_match,
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| +	},
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| +	.probe = gsbi_probe,
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| +};
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| +
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| +module_platform_driver(gsbi_driver);
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| +
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| +MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
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| +MODULE_DESCRIPTION("QCOM GSBI driver");
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| +MODULE_LICENSE("GPL v2");
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