From c7ce6453b769c45006ed4983762f81e130878171 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Wed, 26 Nov 2025 07:26:39 +0800 Subject: [PATCH] mmc: sdhci-of-dwcmshc: Disable internal clock auto gate for Rockchip SOCs Enabling CMDQ support can lead to random occurrences of the error log when there are RPMB access and data flush executed: "mmc2: Timeout waiting for hardware interrupt." Enabling CMDQ and then issuing a DCMD as the final command before disabling it causes the eMMC controller to auto-gate its internal clock. Chip simulation shows this results in a state machine mismatch after CMDQ mode exit, triggering data-timeout errors for all subsequent read and write operations. Therefore, the auto-clock-gate function must be disabled whenever CMDQ is enabled. Signed-off-by: Shawn Lin Acked-by: Adrian Hunter Fixes: fda1e0af7c28 ("mmc: sdhci-of-dwcmshc: Add command queue support for rockchip SOCs") Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-dwcmshc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c @@ -696,10 +696,11 @@ static void dwcmshc_rk3568_set_clock(str sdhci_set_clock(host, clock); - /* Disable cmd conflict check */ + /* Disable cmd conflict check and internal clock gate */ reg = dwc_priv->vendor_specific_area1 + DWCMSHC_HOST_CTRL3; extra = sdhci_readl(host, reg); extra &= ~BIT(0); + extra |= BIT(4); sdhci_writel(host, extra, reg); if (clock <= 52000000) {