AIC8800 is a WiFi/BT module based on Ceva's IP.
This driver is old and not enabled in the starfive target,
so remove it. We can add out of tree drivers if necessary.
Fixes: 8f0f02d2 ("starfive: 6.12: refresh patches and drop upstreamed ones")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Add support for Xiaomi AX6000.
Speficiations:
* SoC: Qualcomm IPQ5018 (64-bit dual-core ARM Cortex-A53 @ 1.0Ghz)
* Memory: Etrontech EM6HE16EWAKG 512 MiB DDR3L-933
* Serial Port: 1v8 TTL 115200n8
* Wi-Fi: IPQ5018 (2x2 2.4 Ghz 802.11b/g/n/ax - up to 574 Mbps)
QCN9024 (4x4 5 Ghz 802.11an/ac/ax - up to 4804 Mbps)
QCA9887 (1x1 5 Ghz 802.11ac/n - up to 433 Mbps)
* Ethernet: IPQ5018 integrated virtual switch connected to:
- external QCA8337 switch (3 LAN Ports 10/100/1000)
- QCA8081 Phy WAN port (10/100/1000/2500)
* Flash: Either of:
- Gigadevice GD5F1GQ4RE9IGD (128 MiB)
- ESMT F50D1G41LB (128 MiB)
* LEDs: 1x WLAN Link (GPIO 23 Active High)
1x System Blue (GPIO 24 Active High)
1x System Yellow (GPIO 25 Active High)
1x WAN Link Blue (GPIO 26 Active High)
1x WAN Link Yellow (GPIO 27 Active High)
1x Green - Unused(GPIO 28 Active High)
3x LAN Phy Green
1x WAN Phy Green
* Buttons: 1x Reset (GPIO 38 Active Low)
Known issue:
- QCA9887 doesn't come up (possibly due to 1-lane PCIe phy not coming up or missing method to drive power),
hence the host PCIe controller is disabled in the DTS.
Flash instructions:
Download XMIR Patcher: https://github.com/openwrt-xiaomi/xmir-patcher
First flash a ubinized OpenWrt initramfs that will serve as the intermediate step, since
OpenWrt uses unified rootfs in order to fully utilize NAND and provide enough space for
packages, through either of the below two methods:
Installation via XMIR Patcher:
1. Load the initramfs image: openwrt-qualcommax-ipq50xx-xiaomi_ax6000-initramfs-factory.ubi
Installation via ubiformat method, through SSH:
1. If needed, enable SSH using XMIR Patcher.
2. Copy the file openwrt-qualcommax-ipq50xx-xiaomi_ax6000-initramfs-factory.ubi to the /tmp directory
3. Open an SSH shell to the router
4. Check which rootfs partition is your router booted in (0 = rootfs | 1 = rootfs_1):
nvram get flag_boot_rootfs
5. Find the rootfs and rootfs_1 mtd indexes respectively:
cat /proc/mtd
Please confirm if mtd18 and mtd19 are the correct indexes from above!
6. Use the command ubiformat to flash the opposite mtd with UBI image:
If nvram get flag_boot_rootfs returned 0:
ubiformat /dev/mtd19 -y -f /tmp/openwrt-qualcommax-ipq50xx-xiaomi_ax6000-initramfs-factory.ubi && nvram set flag_boot_rootfs=1 && nvram set flag_last_success=1 && nvram commit
otherwise:
ubiformat /dev/mtd18 -y -f /tmp/openwrt-qualcommax-ipq50xx-xiaomi_ax6000-initramfs-factory.ubi && nvram set flag_boot_rootfs=0 && nvram set flag_last_success=0 && nvram commit
7. Reboot the device by:
reboot
Continue in order to pernamently flash OpenWrt:
1. Upload the sysupgrade image to /tmp/ using SCP:
scp -O <path to image> root@192.168.1.1:/tmp/
2. Open an SSH shell to 192.168.1.1 from a PC within the same subnet
3. Use sysupgrade to flash the sysupgrade image:
sysupgrade -n -v /tmp/openwrt-qualcommax-ipq50xx-xiaomi_ax6000-squashfs-sysupgrade.bin
Device will reboot with OpenWrt, and then sysupgrade can be used to upgrade the device when desired.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19004
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upon detecting the ID for the ESMT F50D1G41LB chip, the fifth byte
returned is always 0x00 instead of the expected JEDEC continuation code
of 0x7f. This causes detection to fail:
[ 0.304399] spi-nand spi0.0: unknown raw ID c8117f7f00
[ 0.508943] spi-nand: probe of spi0.0 failed with error -524
So let's revert back to the 4 byte ID code for this chip
specifically.
Fixes: 4bd14b2fd8a8 ("mtd: spinand: esmt: Extend IDs to 5 bytes")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/19004
Signed-off-by: Robert Marko <robimarko@gmail.com>
The qca8k dsa switch can use either an external or internal mdio bus.
This depends on whether the mdio node is defined under the switch node
itself and, as such, the internal_mdio_mask is populated with its
internal phys. Upon registering the internal mdio bus, the
internal_mdio_bus of the dsa switch is assigned to this bus.
When an external mdio bus is used, it is left unassigned, though its id
is used to create the device names of the leds.
This leads to the leds being named '(efault):00:green:lan' and so on as
the internal_mdio_bus is null. So let's fix this by adding a null check
and use the devicename of the external bus instead when an external bus
is configured.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19004
Signed-off-by: Robert Marko <robimarko@gmail.com>
Continuous read does not work properly in on-die ECC mode.
Disable it to fix ubi io error on the GL.iNet GL-MT3000.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Fix wrong pwm-fan node for bpi-r4.
Remove useless status for pwm-fan.
Remove blank lines added by b992aa11.
Fixes: b992aa11 ("mediatek: dts: bring mt7988a.dtsi closer to upstream")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Only 2 devices use leading zeroes to pad interface names,
align the remaining ones so that it is consistent.
Signed-off-by: Joe Holden <jwh@zorins.us>
Link: https://github.com/openwrt/openwrt/pull/18913
Signed-off-by: Robert Marko <robimarko@gmail.com>
Specifications:
- SoC: Broadcom BCM6358 dual 300MHz MIPS
- Flash: 16MB NOR
- RAM: 64MB DDR
- Ethernet: 4x 100M
- Wifi: Broadcom BCM4318
- 2x USB 2.0 port
- 2x Button
- 9x LED
- RJ11 2x FXS VoIP (unsupported)
- RJ11 xDSL (unsupported)
Install instructions:
- Assign static IP 192.168.1.100 to PC.
- Unplug the power source.
- Press the RESTART button at the router, don't release it yet!
- Plug the power source and wait at least 15 seconds.
- Release the RESTART button.
- Browse to http://192.168.1.1 with your PC.
- Upload the openwrt-bmips-bcm6358-huawei_hg553-squashfs-cfe.bin file.
- Wait some minutes until the firmware upgrade completes.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
I-O DATA WN-DAX3000GR is a 2.4/5 GHz band 11ax (Wi-Fi 6) router, based
on IPQ5018.
Specification:
- SoC : Qualcomm IPQ5018
- RAM : DDR3 512 MiB
- Flash : SPI-NAND 128 MiB (Macronix MX35UF1G24AD-Z4I)
- WLAN : 2.4/5 GHz 2T2R
- 2.4 GHz : Qualcomm IPQ5018 (SoC)
- 5 GHz : Qualcomm Atheros QCN6102
- Ethernet : 5x 10/100/1000 Mbps
- wan (phy) : Qualcomm IPQ5018 (SoC)
- lan (switch) : Qualcomm Atheros QCA8337
- LEDs/Keys (GPIO): 7x/5x
- UART : through-hole on PCB (J3)
- assignment : 3.3V, TX, RX, NC, GND from tri-angle marking
- settings : 115200n8
- USB : USB 2.0 Type-A (through-hole on PCB, "J6")
- Power : 12 VDC, 1A (Typ. 930 mA)
Flash instruction using factory.bin image:
1. Boot WN-DAX3000GR with router mode
2. Access to the WebUI ("http://192.168.0.1/") on the device and open
the firmware update page ("ファームウェア")
3. Select the OpenWrt factory.bin image and click update ("更新") button
4. Wait ~120 seconds to complete flashing
Switching to the stock firmware:
1. Load the elecom.sh script
. /lib/upgrade/elecom.sh
2. Check the current index of rootfs
bootconfig_rw_index 0:bootconfig rootfs
3. Set the index to inverted value
bootconfig_rw_index 0:bootconfig rootfs <value>
bootconfig_rw_index 0:bootconfig1 rootfs <value>
example:
- step2 returned "0":
bootconfig_rw_index 0:bootconfig rootfs 1
bootconfig_rw_index 0:bootconfig1 rootfs 1
- step2 returned "1":
bootconfig_rw_index 0:bootconfig rootfs 0
bootconfig_rw_index 0:bootconfig1 rootfs 0
4. Reboot
Partition Layout (Stock FW, bootconfig(rootfs)=1):
0x000000000000-0x000000080000 : "0:SBL1"
0x000000080000-0x000000100000 : "0:MIBIB"
0x000000100000-0x000000140000 : "0:BOOTCONFIG"
0x000000140000-0x000000180000 : "0:BOOTCONFIG1"
0x000000180000-0x000000280000 : "0:QSEE"
0x000000280000-0x000000380000 : "0:QSEE_1"
0x000000380000-0x0000003c0000 : "0:DEVCFG"
0x0000003c0000-0x000000400000 : "0:DEVCFG_1"
0x000000400000-0x000000440000 : "0:CDT"
0x000000440000-0x000000480000 : "0:CDT_1"
0x000000480000-0x000000500000 : "0:APPSBLENV"
0x000000500000-0x000000640000 : "0:APPSBL"
0x000000640000-0x000000780000 : "0:APPSBL_1"
0x000000780000-0x000000880000 : "0:ART"
0x000000880000-0x000000900000 : "0:TRAINING"
0x000000900000-0x000003c40000 : "rootfs_1"
0x000003c40000-0x000003fc0000 : "Config"
0x000003fc0000-0x000007300000 : "rootfs"
0x000007300000-0x000007680000 : "Config_2"
0x000007680000-0x000007700000 : "idmkey"
0x000007700000-0x000007c00000 : "Reserved"
0x000007c00000-0x000007c80000 : "FWHEADER"
0x000007c80000-0x000007d00000 : "Factory"
Known Issues:
- This device has a Macronix MX35UF1G24AD SPI-NAND chip registered as
oobsize=128 in Linux Kernel. But using BCH8 breaks I/O on the chip
with the following errors, so this support uses BCH4 instead.
[ 1.542261] 0x000000480000-0x000000500000 : "0:appsblenv"
[ 1.547959] 1 fixed-partitions partitions found on MTD device 0:appsblenv
[ 1.551265] Creating 1 MTD partitions on "0:appsblenv":
[ 1.558096] 0x000000000000-0x000000040000 : "env-data"
[ 1.627282] u-boot-env-layout 79b0000.qpic-nand:flash@0:partitions:partition-0-appsblenv:partition@0:nvmem-layout: probe with driver u-boot-env-layout failed with error -74
root@OpenWrt:~# strings /dev/mtdblock10
[ 77.806720] mtdblock: MTD device '0:appsblenv' is NAND, please consider using UBI block devices instead.
[ 77.807554] I/O error, dev mtdblock10, sector 0 op 0x0:(READ) flags 0x80700 phys_seg 4 prio class 0
[ 77.815977] I/O error, dev mtdblock10, sector 8 op 0x0:(READ) flags 0x80700 phys_seg 3 prio class 0
[ 77.824721] I/O error, dev mtdblock10, sector 16 op 0x0:(READ) flags 0x80700 phys_seg 2 prio class 0
[ 77.834095] I/O error, dev mtdblock10, sector 24 op 0x0:(READ) flags 0x80700 phys_seg 1 prio class 0
[ 77.843278] I/O error, dev mtdblock10, sector 0 op 0x0:(READ) flags 0x0 phys_seg 1 prio class 0
[ 77.851577] Buffer I/O error on dev mtdblock10, logical block 0, async page read
Notes:
- This device has dual-boot feature and it's managed by the index in the
0:bootconfig and 0:bootconfig1 partitions.
- There are through-holes on PCB for USB 2.0, but it cannot be accessed
without disassembly of the housing. So it's not enabled in this
support.
- WN-DAX3000GR has the "bt_fw" volume in the firmware UBI in addition to
the volumes that will be removed in the section of ELECOM WRC-X3000GS2
in /lib/upgrade/platform.sh.
That volume is unnecessary for OpenWrt and add
`remove_oem_ubi_volume bt_fw` to remove that volume when sysupgrade.
(that function doesn't anything without errors if no specified volume)
MAC Addresses:
LAN : 50:41:B9:xx:xx:64 (0:APPSBLENV, "ethaddr"/"eth1addr" (text))
WAN : 50:41:B9:xx:xx:66 (0:APPSBLENV, "eth0addr" (text))
2.4 GHz: 50:41:B9:xx:xx:64 (0:APPSBLENV, "wifi0" (text))
5 GHz : 50:41:B9:xx:xx:65 (0:APPSBLENV, "wifi1" (text))
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19053
Signed-off-by: Robert Marko <robimarko@gmail.com>
I-O DATA WN-DAX3000GR has a MSTC (Mitra Star Technology Corp.) specific
header with a different length than ELECOM WRC-X3000GS2.
Make the header length configurable by parameterizing on
Build/mstc-header.
- WRC-X3000GS2: 0x400
- WN-DAX3000GR: 0x480
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19053
Signed-off-by: Robert Marko <robimarko@gmail.com>
The reason fwmode 2 was used for ipq5018 and qcn6122 wifi was that
coldboot calibration doesn't work and causes the firmware to crach
during wifi bringup. Since coldboot calibration is now disabled in the
driver, all boards can now use their respective firmware memory mode, so
let's the property in all board DTS files accordingly.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19083
Signed-off-by: Robert Marko <robimarko@gmail.com>
The I2C and SPI packages required for each RPi generation is different.
Therefore, in order to avoid confusion let's select them by default.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Three different code paths for the same phy model. Now the bus
is prepared to handle c45 (mmd) read/writes correctly. Remove
the custom implementations and let generic kernel functions do
their best. To achieve this
- disable the PHY-mode EEE in rtl821x_config_init() as upstream does
- provide mmd read/write functions that avoid EEE via c45 over c22
While chaning the phy_driver functions sort them alphabetically.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
rtl8214fc_media_is_fibre() will need to be run when bus lock is held.
Split the function into two versions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
As the mdio bus has been hardened and can now handle c45 requests
the DSA driver must honor that as well. For this
- add proper upstreamed bus read_c45 and write_c45 functions
- take over the disabled port mask from upstream bus
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
With the follow up EEE patches the mdio bus will run c22 and c45
accesses during initial scan. Especially when accessing addresses
beyond the CPU port phy requests might fail in a way that cannot
be handled gratefully. Do two things
- do not allow access to addresses starting from cpu port
- set the scan disable bitmask to ports starting from cpu port
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some bits where missed during the last enhancement of the mdio
patch. In the forthcoming patches the phy_mask will be populated
to avoid unwanted ports (>= cpu port) from being scanned. Add
additional locations where 32 bit values need to be converted
to 64 bits.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
If mmd and normal phy ops are issued the bus is lost because
of wrong park page settings. Force it to 0x1f as in GPL.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Allow to build the new kernel.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
The new kernel has relocated the definition of struct platform_device.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
The DSA driver uses set_mac_eee() for the outside API while
the interal helper is called port_eee_set(). Align that.
Additionally do not call the internal helpers directly by
the function names but use the register assignments.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upstream will get rid of the get_mac_eee() function in the DSA
driver and replace it by a boolean alternative. While we fill a
lot of data here (because of EEE bugs in the Realtek phy layer)
other DSA drivers only return if EEE is available or not for a
port. To make the next kernel upgrade easier follow that design.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
To avoid unneeded interrupts the R4K timer is deactivated during
secondary cpu initialization. This is currently done during
phase init_secondary(). With the upgrade to 6.12 the kernel runs
a primary/secondary cpu timer/counter synchronization to verify the
proper setup in synchronise_count_slave(). That runs at a later
point in time and expects the secondary counter to be fully
functional. Finding a deactivated counter results in the following
messages:
WARNING: CPU: 1 PID: 0 at arch/mips/kernel/sync-r4k.c:99 check_counter_warp+0x220/0x254
Warning: zero counter calibration delta: 0 [max: 6500000]
Counter synchronization [CPU#0 -> CPU#1]:
Measured 278760029 cycles counter warp between CPUs
Relocate the deactivation to smp_finsh() at the end of the cpu
startup sequence. Additionally polish the startup code and remove
all unneeded parts.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Per IEEE 802.3 definition we have:
- parallel XGMII for single 10GBit ONLY links
- serial USGMII for 8 port 1GBit links (not known by kernel)
- serial USXGMII: for single/multiple links with a total bandwidth of 10GBit
The phy-mode of the first eight ports of the XGS1250-12 have always been
defined as XGMII (without S). This came from a confusion with the similar
named Realtek proprietary XSGMII (with S) mode that is basically 10GB SGMII.
From the above definition this is wrong but worked until kernel 6.6. With
the upgrade to 6.12 there is an enforced capabilities check within
phy_caps_from_interface() and link validation fails with
lan1: validation of xgmii with support 62ef and advertisement 62c0 failed: -EINVAL
lan1: failed to connect to PHY: -EINVAL
lan1: error -22 setting up PHY for tree 0, switch 0, port 0
Switch the ports to USXGMII as the most flexible option. This might be no
final solution but at least it better describes the phy/mac link.
Fixes 5b8b382df9 ("realtek: Add support for ZxXEL XGS1250-12 Switch")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix minor compilation errors due to kernel changes.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upstream has integrated the Realtek target into the generic MIPS
initialization and so MACH_REALTEK_RTL has gained some new features.
Especially:
- CONFIG_MACH_GENERIC_CORE generates central modules
- board-realtek module adds device specific extensions
The current downstream initialization works well and upgrading to
kernel 6.12 is not the right time to harmonize this. Modify the
MACH definitions to the current needs.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
The validate function no longer exists in phylink_mac_ops. Remove
it for the internal ethernet interface. Instead provide some
meaningful mac capabilities.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Not only the link but also the mac capabilities are needed here.
Additionally do some alphabetical sorting.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
The old upstream notation has been changed to something not so racist.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
EEE functions are now called with ethtool_keee instead of
ethtool_eee. Replace all occurrences. This will fix function
signature checks but still produces compilation errors due
to structure changes.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Patches where fuzz had to be cleaned up.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
All these patches needed no manual intervention and applied cleanly
with new source code positions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Thanks to Chris Packham this driver got upstreamed. Drop the
downstream files and patches.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add kernel package for Broadcom Settop/DSL I2C controller.
This controller is used on RPi devices.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
This commit changes LAN1 to be WAN and LAN2 to be LAN, like all other
dual port Extreme Networks devices.
This partially reverts commit 84a489b7cf
Signed-off-by: Christian Schmidbauer <github@grische.xyz>
Fixes LAN LED "1" to show activity of LAN1 and LAN LED "2" to show
activity of LAN2, not vice versa.
Signed-off-by: Christian Schmidbauer <github@grische.xyz>
Update the pin-configuration as well as maximum frequency for the eMMC
flash.
- Use 26 MHz as the maximum clock of the eMMC memory
- Configure 12mA as the pin drive-strength
- Enable internal pull-reistors
Signed-off-by: Yin Ni <yin.ni@gl-inet.com>
[adapt commit message]
Signed-off-by: David Bauer <mail@david-bauer.net>
The function name is misspelled and does not exist. Fix the function
name so the correct function is called.
Signed-off-by: David Bauer <mail@david-bauer.net>
Multiple users have reported a regression [1] in OpenWRT 24.10 with the
ramips/mt7621 target, which has the MT7530 PHYs: the Ethernet link is
periodically going down for a brief period of time:
mt7530-mdio mdio-bus:1f lan1: Link is Down
br-lan: port 1(lan1) entered disabled state
mt7530-mdio mdio-bus:1f lan1: Link is Up - 1Gbps/Full - flow control rx/tx
The symptoms stop after disabling EEE and it was reported by Mediatek in
2021 that EEE is unstable for the MT7530 PHYs [2]:
> EEE of the 10-year-old MT7530 internal gephy has many IOT problems, so
> it is recommended to disable its EEE.
EEE is enabled by default for these devices in OpenWRT 24.10 whereas in the
previous version (OpenWRT 23.05, Linux 5.15) it was not. It was determined
that in Linux 6.6, the PHY driver tries to disable EEE in
mtk_gephy_config_init() in drivers/net/phy/mediatek-ge.c, but this is later
overridden by a subsequent execution of the genphy_c45_write_eee_adv()
function, which enables every EEE mode supported.
The best way forward for now seems to be to mark EEE as broken directly in
the devicetree, which affects the genphy_c45_write_eee_adv() function.
There are some devices, like GnuBee GB-PC2, that define additional PHYs,
for example ethernet-phy@5 or ethernet-phy@7. As reported by Chester A.
Unal, these are not MT7530 PHYs and they are not affected.
This would need to be cherrypicked for the OpenWRT 24.10 branch.
[1] https://github.com/openwrt/openwrt/issues/17351
[2] https://lore.kernel.org/all/0adde34f936a2dafca40b06b408d82afe0852327.camel@mediatek.com/
Tested-by: Darren Tucker
Signed-off-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Closes: https://github.com/openwrt/openwrt/issues/17351
Link: https://github.com/openwrt/openwrt/pull/18585
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Specifications:
- SoC: Broadcom BCM6358 dual 300MHz MIPS
- Flash: 16MB NOR Macronix MX29GL128EHT2I-90G
- RAM: 64MB DDR
- Ethernet: 4x 100M
- Wifi: Ralink RT3062F
- 3x USB 2.0 port
- 4x Button
- 13x LED
- RJ11 2x FXS VoIP (unsupported)
- RJ11 xDSL (unsupported)
Install instructions:
- Assign static IP 192.168.1.100 to PC.
- Unplug the power source.
- Press the RESTART button at the router, don't release it yet!
- Plug the power source and wait at least 15 seconds.
- Release the RESTART button.
- Browse to http://192.168.1.1 with your PC.
- Upload the openwrt-bmips-bcm6358-huawei_hg556a-c-squashfs-cfe.bin file.
- Wait some minutes until the firmware upgrade completes.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
It's time to give the patches documentation some love by:
- Using Markdown.
- Differentiating between generic and specific target patches.
- Adding deeper explanation about patch numbering.
Link: https://github.com/openwrt/openwrt/pull/19092
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Missing headers causes an error on kernel 6.12:
arch/mips/ralink/irq.c:86:5: error: no previous prototype for 'get_c0_perfcount_int' [-Werror=missing-prototypes]
86 | int get_c0_perfcount_int(void)
| ^~~~~~~~~~~~~~~~~~~~
arch/mips/ralink/irq.c:92:14: error: no previous prototype for 'get_c0_compare_int' [-Werror=missing-prototypes]
92 | unsigned int get_c0_compare_int(void)
| ^~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/18654
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
