Datasheet claims this register bit is supposed to be set by default,
however it was found in practice to not be, and OEM drivers would set
this bit at the same time.
Signed-off-by: Richard Huynh <voxlympha@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20465
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Fix typo in register for the serdes global config.
Fixes: ddb0cd276c ("kernel: rtl8261n: add support for Serdes TX swap")
Signed-off-by: Richard Huynh <voxlympha@gmail.com>
[ add commit description ]
Link: https://github.com/openwrt/openwrt/pull/20465
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport upstream minor fixed for NPU handling that might result in
kernel panic or handle leak.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add missing leds and network board files for EN7581 SoC.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
[ drop reference to downstream 10g RFB board ]
Link: https://github.com/openwrt/openwrt/pull/20556
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Similar to e92b153e99 ("mediatek: introduce KERNEL_LOADADDR to Device/Default template"),
let's move the default loadaddr to Device/Default.
What's more, use 0x80200000 instead of the SDK default value 0x80088000
to avoid the following error which may overwrite TZ memory and cause crash:
[ 0.000000] [Firmware Bug]: Kernel image misaligned at boot, please fix your bootloader!
[ 0.000000] OF: reserved mem: Reserved memory: failed to reserve memory for node 'atf@80000000': base 0x0000000080000000, size 2 MiB
Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
[ fix spelling mistake ]
Link: https://github.com/openwrt/openwrt/pull/20470
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Enable USB node on eMMC RFB board and disable USB2 3.0 port to make the
3rd PCIe line correctly work.
This is needed to prevent the xHCI driver to mess with PCIe by
configuring the USB2 3.0 port. Port will still be detected but won't be
configureed by the driver and won't have PHY to configure for.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The 3rd PCIe line use the USB2 serdes for PCIe operation. Correctly set
it to the DT node so that the mode can be correctly set in the PHY
driver.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add pending patch for USB support on AN7581 SoC. This is also required
to make operational the 3rd PCIe line that use the USB2 Serdes for PCIe
operations.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Fix regression from back when support for RTL930x was added.
While at it replace 0x8000 by BIT(15).
Fixes: 27029277f9
Tested-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Signed-off-by: Felix Baumann <felix.bau@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20549
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove SerDes initialization/configuration calls from the DSA driver in
'rtl93xx_phylink_mac_config' and let our PCS driver setup the SerDes now
that the driver is able to do that.
Adjust some details in rtl93xx_phylink_mac_config to ensure the MAC is
properly disabled MAC before configuring the SerDes. This was done
within the SerDes code before.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20539
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use regmap to access registers in the global register space so we don't
have to use the old macros sw_r32/sw_w32 anymore.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20539
Signed-off-by: Robert Marko <robimarko@gmail.com>
Import SerDes configuration code from PHY driver into the PCS driver.
Only do mandatory adjustments, rename the function to adhere to the
naming scheme, adjust all SerDes access calls.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20539
Signed-off-by: Robert Marko <robimarko@gmail.com>
This fixes the sysupgrade image generation for the LBR20 as before
updating resulted in a brick which needed to be recovered using
nmrpflash.
UART log of a bricked unit:
Loading DNI firmware for checking...
Loading firmware 1 ...
NAND read: device 0 offset 0xa600000, size 0x20000
131072 bytes read: OK
NAND read: device 0 offset 0xa600000, size 0x380000
3670016 bytes read: OK
rootfs imge header corrupted !
Loading firmware 2 ...
NAND read: device 0 offset 0xa600000, size 0x20000
131072 bytes read: OK
NAND read: device 0 offset 0xa600000, size 0x380000
3670016 bytes read: OK
rootfs imge header corrupted !
Comparing the partition contents of a bricked and a working unit showed
that on the bricked one the fake uImage header was missing. The UBI
partition also showed significant changes. Both are fixed when the
base DniImage receipt is used.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20558
Signed-off-by: Robert Marko <robimarko@gmail.com>
This aligns the LED behaviour with other Orbi devices. Orbi devices have
multiple RBG LEDs at the top of the device and two status LEDs at the
back next to the barrel jack.
The current behaviour of other Orbi devices is to use the multi-color
LEDs at the top for status indication and the green/red LEDs at the back
for running/panic-indication. This matches the vendor behaviour except
the color choice.
Other devices use green as running, blue on upgrade, red on failsafe and
white on bootup, so this aligns the LBR20 behaviour to the rest.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20558
Signed-off-by: Robert Marko <robimarko@gmail.com>
This will remove the ethernet0 alias and TODO as setting the LAN MAC via
nvmem to gmac0 will set the correct mac to the switch.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20558
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some SoC might use the Serdes for the second USB port as a 3rd PCIe
line (with the SSTR register correctly setup).
Add the node for the 3rd PCIe card and enable for the eMMC RFB board.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
gpio-leds were not working on F@ST3864OP before was merged.
This pull request adds definitions for all LEDs, including the previously
non-working WAN LEDs.
Signed-off-by: Hang Zhou <929513338@qq.com>
Link: https://github.com/openwrt/openwrt/pull/20533
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
In Realtek implementation USXGMII is divided in submodes:
- USXGMII_SX: 10G single link, equivalent of PHY_INTERFACE_MODE_USXGMII
- USXGMII_DX: 10G two links (2*5G ?),
- USXGMII_QX: 10G four links, presumably 4*2.5G, used with the RTL8224,
equivalent of PHY_INTERFACE_MODE_10G_QXGMII.
This CL adds the 10_GQXGMII modes to the RTL930x implementation. In
particular the "mode set" function is extended to support both simple
mode set, and force mode set depending on the mode according to
dal_longan_sds_mode_set [1].
[1] https://github.com/ddejean/dms-1250-oss-release/blob/main/sdk/sdk_rtk_switch/rtk-sdk/src/dal/longan/dal_longan_sds.c#L1746
Signed-off-by: Damien Dejean <dam.dejean@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20472
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix the GPIO assignment of RX-LOS and TX-DISABLE for all SFP ports. Both
were actually swapped when adding support for the device. Apparently,
this didn't cause any issues.
Fixes: 62d50fb196
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20532
Signed-off-by: Robert Marko <robimarko@gmail.com>
The OnHub bootloader tries to patch the calibration directly into the
device tree, but it uses constant paths that look like this:
static const char *dt_path = "soc/pci@%8.8x/pcie@0/ath10k@0,0";
https://chromium.googlesource.com/chromiumos/platform/depthcharge/+/refs/heads/firmware-storm-6315.B/src/board/storm/wifi_calibration.c#69
These paths have changed in recent kernels, so we need to adapte.
The CONFIG_GOOGLE_VPD kernel module (provided by kmod-google-firmware)
is present on OnHub, and provides alternative means to locate this
information, in /sys/firmware/vpd/ro/wifi_base64_calibration{0,1,2}. Use
that instead.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20477
Signed-off-by: Robert Marko <robimarko@gmail.com>
Backport a patch fixing a kernel panic on airoha_hw_init fail. This
should better handle scenario with NPU load Probe deferring.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport cleanup patch for Airoha Ethernet patch to permit easier
backport in the future.
Automatically refresh all affected patch.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add pending patch to make address some workaround needed to make the
Aeonsemi AS21xxx PHY working on the Airoha AN7581/AN7583 board.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Airoha AN7581 eMMC RFB board mount 2 Aeonsemi AS21xxx PHY. One is
usually connected to GDM4 and the other is optionally connected to GDM2.
Add the relevant nodes to support the one connected to GDM4.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Userspace handling is deprecated.
Move calibration for pcie node out of dtsi. calibration size for ath10k
and ath9k differs.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16231
Signed-off-by: Robert Marko <robimarko@gmail.com>
Align the sorting of cases with other targets.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20518
Signed-off-by: Robert Marko <robimarko@gmail.com>
Merge some identical cases in base-files.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20518
Signed-off-by: Robert Marko <robimarko@gmail.com>
This changes the use of spaces to tabs in all base-files to be in line
with other targets.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20518
Signed-off-by: Robert Marko <robimarko@gmail.com>
This removes the obsolete trailing whitespaces from all base-files cases
to be in line with other targets.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20518
Signed-off-by: Robert Marko <robimarko@gmail.com>
Pack the BL2 and BL31+U-Boot artifacts as Airoha AN7581 is currently
supported in upstream U-Boot and bootloader files can be used for
unfused boards.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Since ddf94f7489 and 4a5de35dba, a SerDes is configured by the PCS
driver. All code from PHY and DSA related to this has been imported and
adjusted into the PCS driver. Thus, remove the unused code from the PHY
driver now.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20494
Signed-off-by: Robert Marko <robimarko@gmail.com>
Backport additional patch required for NPU support of Airoha AN7583.
These are specific for the NPU module with some minor fixes and to adds
upport for loading the specific Airoha AN7583 NPU firmware.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add relevant nodes for NPU support for Airoha AN7583 and enable the
kernel config to enable support in the Airoha Ethernet driver.
NPU firmware is scheduled to be upstreamed to linux-firmware and will be
added once present upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Fix the current image Makefile for Airoha AN7583 by dropping the
artifacts entry for bootloader and add default PKG for the PHY mounted
on the RFB boards.
The artifacts for the bootloader will be readded later once ATF-A
support will be pushed mainline.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
While adding support for Airoha AN7583, it was forget to push the EMMC
DTS while defining the variant in the image Makefile.
Add the missing DTS to fix image creation error.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
On the Airoha AN7583 EVB there are 2 Aeonsemi AS21xxx PHY but only the
one connected to Serdes Ethernet is usable as the other connected to
Serdes PON is not actually HW connected (as the serdes is connected to
the BOSA port)
Add comments and disable the relevant PHY.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit changes the Meraki MR33 and MR74 device trees to use nvmem
for ART calibration.
The WiFi BDF was moved from insect-common.dtsi to the respective
device files in preparation for additional insect-family devices being added.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20474
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Use ath9k LED instead of specifying a generic one.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16286
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Userspace handling is deprecated.
Use ath9k LED binding to avoid generic LED usage.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16286
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This board is also as known as E-Life ETR631-T/ETR635-U.
Hardware specification:
SoC: MediaTek MT7981B 2x A53
Flash: 128 MB SPI-NAND
RAM: 256MB DDR3
Ethernet: 4x 10/100/1000 Mbps
Switch: MediaTek MT7531AE
WiFi: MediaTek MT7976C
Button: Reset, Mesh
Power: DC 12V 1A
Gain telnet access:
1. Login into web interface, and download the configuration.
2. Uncompress the configuration:
* Enter fakeroot if you are not login as root.
tar -zxf <filename>.tar.gz
3. Edit 'etc/passwd', remove root password: 'root::1:0:99999:7:::'.
4. Edit 'etc/rc.local', insert telnetd command before 'exit 0':
( sleep 3s; telnetd; ) &
5. Repack the configuration:
tar -zcf backup.tar.gz etc/
6. Upload new configuration via web interface, now you can connect to
KOMI A31 via telnet.
Flash instructions:
1. Connect to KOMI A31, backup everything, especially 'Factory' part.
2. Write new BL2:
mtd write openwrt-mediatek-filogic-konka_komi-a31-preloader.bin BL2
3. Write new FIP:
mtd write openwrt-mediatek-filogic-konka_komi-a31-bl31-uboot.fip FIP
4. Set static IP on your PC:
IP 192.168.1.254/24, GW 192.168.1.1
5. Serve OpenWrt initramfs image using TFTP server.
6. Cut off the power and re-engage, wait for TFTP recovery to complete.
7. After OpenWrt has booted, perform sysupgrade.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/20357
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Allows us a bit more headroom flash wise and access to more recent
compression algorithms.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20445
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
