Backport support for Aeonsemi AS121xxx PHY. The PHY require dedicated
firmware to be loaded to correctly work and support a big family of
Aeonsemi PHY that provide from 1G to 10G speed.
Automatically refresh all affected patch and file (rtl PHY).
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The addition of the soft_reset() function to the RTL8221B PHYs
missed to take care of C22/C45 standalone PHY versions. Especially
on RTL930x switch devices with these PHY the reset fails for the
C45 operation mode. This comes from the fact that the mdio bus
disables C22 read/writes when being set to C45.
Upstream has gained a proper C45 reset function. Use it for the
C45 PHY models.
Fixes: 7e3284eef7 ("generic: use genphy_soft_reset for RealTek 2.5G PHYs")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19843
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is an automatically generated commit.
When doing `git bisect`, consider `git bisect --skip`.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/16547
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
