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mediatek: update pending and rename merged patch

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Add patch headers and description for pending patch.
Add version tag to patch already merged upstream.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle 2022-10-19 15:31:35 +01:00
parent 711f1a8bcb
commit dca5bf6d53
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2 changed files with 57 additions and 21 deletions
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63
target/linux/mediatek/patches-5.15/501-auxadc-add-auxadc-32k-clk.patch
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@ -1,3 +1,40 @@
From patchwork Wed Oct 19 14:37:35 2022
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
X-Patchwork-Id: 13011901
Date: Wed, 19 Oct 2022 15:37:35 +0100
From: Daniel Golle <daniel@makrotopia.org>
To: Jonathan Cameron <jic23@kernel.org>,
Lars-Peter Clausen <lars@metafoo.de>,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-iio@vger.kernel.org
Cc: David Bauer <mail@david-bauer.net>,
Gwendal Grignou <gwendal@chromium.org>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 1/2] iio: adc: mt6577_auxadc: add optional 32k clock
Message-ID:
<f98ed7f3fc15a0614443a57427d46ce17ec2e0cc.1666190235.git.daniel@makrotopia.org>
MIME-Version: 1.0
Content-Disposition: inline
X-BeenThere: linux-mediatek@lists.infradead.org
X-Mailman-Version: 2.1.34
Precedence: list
List-Id: <linux-mediatek.lists.infradead.org>
MediaTek MT7986 and MT7981 require an additional clock to be brought up
for AUXADC. Add support for that in the driver, similar to how it's
done in MediaTek's SDK[1].
[1]: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/refs/heads/master/target/linux/mediatek/patches-5.4/500-auxadc-add-auxadc-32k-clk.patch
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/iio/adc/mt6577_auxadc.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
--- a/drivers/iio/adc/mt6577_auxadc.c --- a/drivers/iio/adc/mt6577_auxadc.c
+++ b/drivers/iio/adc/mt6577_auxadc.c +++ b/drivers/iio/adc/mt6577_auxadc.c
@@ -42,6 +42,7 @@ struct mtk_auxadc_compatible { @@ -42,6 +42,7 @@ struct mtk_auxadc_compatible {
@ -8,16 +45,14 @@
struct mutex lock; struct mutex lock;
const struct mtk_auxadc_compatible *dev_comp; const struct mtk_auxadc_compatible *dev_comp;
}; };
@@ -222,6 +223,14 @@ static int __maybe_unused mt6577_auxadc_ @@ -222,6 +223,12 @@ static int __maybe_unused mt6577_auxadc_
return ret; return ret;
} }
+ if (!IS_ERR(adc_dev->adc_32k_clk)) { + ret = clk_prepare_enable(adc_dev->adc_32k_clk);
+ ret = clk_prepare_enable(adc_dev->adc_32k_clk); + if (ret) {
+ if (ret) { + pr_err("failed to enable auxadc clock\n");
+ pr_err("failed to enable auxadc clock\n"); + return ret;
+ return ret;
+ }
+ } + }
+ +
mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC, mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
@ -36,15 +71,15 @@
return ret; return ret;
} }
+ adc_dev->adc_32k_clk = devm_clk_get(&pdev->dev, "32k"); + adc_dev->adc_32k_clk = devm_clk_get_optional(&pdev->dev, "32k");
+ if (IS_ERR(adc_dev->adc_32k_clk)) { + if (IS_ERR(adc_dev->adc_32k_clk)) {
+ dev_err(&pdev->dev, "failed to get auxadc 32k clock\n"); + dev_err(&pdev->dev, "failed to get auxadc 32k clock\n");
+ } else { + return PTR_ERR(adc_dev->adc_32k_clk);
+ ret = clk_prepare_enable(adc_dev->adc_32k_clk); + }
+ if (ret) { + ret = clk_prepare_enable(adc_dev->adc_32k_clk);
+ dev_err(&pdev->dev, "failed to enable auxadc 32k clock\n"); + if (ret) {
+ return ret; + dev_err(&pdev->dev, "failed to enable auxadc 32k clock\n");
+ } + return ret;
+ } + }
+ +
adc_clk_rate = clk_get_rate(adc_dev->adc_clk); adc_clk_rate = clk_get_rate(adc_dev->adc_clk);

15
target/linux/mediatek/patches-5.15/800-nvmem-mtk-efuse-support-minimum-one-byte-access-stri.patch → target/linux/mediatek/patches-5.15/800-v5.17-nvmem-mtk-efuse-support-minimum-one-byte-access-stri.patch
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@ -1,15 +1,16 @@
From 44ae4ed142265a6d50a9d3e6f4c395f97b6849ab Mon Sep 17 00:00:00 2001 From 98e2c4efae214fb7086cac9117616eb6ea11475d Mon Sep 17 00:00:00 2001
From: Zhanyong Wang <zhanyong.wang@mediatek.com> From: Chunfeng Yun <chunfeng.yun@mediatek.com>
Date: Sat, 6 Nov 2021 20:06:30 +0800 Date: Thu, 9 Dec 2021 17:42:34 +0000
Subject: [PATCH 2/5] nvmem: mtk-efuse: support minimum one byte access stride Subject: [PATCH] nvmem: mtk-efuse: support minimum one byte access stride and
and granularity granularity
In order to support nvmem bits property, should support minimum 1 byte In order to support nvmem bits property, should support minimum 1 byte
read stride and minimum 1 byte read granularity at the same time. read stride and minimum 1 byte read granularity at the same time.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Zhanyong Wang <zhanyong.wang@mediatek.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Change-Id: Iafe1ebf195d58a3e9e3518913f795d14a01dfd3b Link: https://lore.kernel.org/r/20211209174235.14049-4-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- ---
drivers/nvmem/mtk-efuse.c | 13 +++++++------ drivers/nvmem/mtk-efuse.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-) 1 file changed, 7 insertions(+), 6 deletions(-)