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realtek: adapt devices to backported i2c driver

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Adapt the device tree definitions of rtl93xx devices and the base dtsi
for rtl930x and rtl931x to match with what's expected by the recently
backported RTL9300 I2C driver.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19736
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Jonas Jelonek 2025-06-24 19:02:33 +00:00 committed by Robert Marko
parent 44655c97bb
commit dc54af8639
7 changed files with 153 additions and 244 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

54
target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12.dts
View File

@ -29,42 +29,6 @@
};
};
/* i2c of the SFP cage: port 11 & port 12 */
i2c0: i2c-rtl9300@1b00036c {
compatible = "realtek,rtl9300-i2c";
reg = <0x1b00036c 0x3c>;
#address-cells = <1>;
#size-cells = <0>;
sda-pin = <9>;
scl-pin = <8>;
clock-frequency = <100000>;
};
i2cmux {
compatible = "realtek,rtl9302-i2c-mux", "realtek,i2c-mux-rtl9300";
#address-cells = <1>;
#size-cells = <0>;
i2c-parent = <&i2c0>;
/* i2c of the left SFP+ cage as seen from the front: port 11 */
i2c0_0: i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
sda-pin = <9>;
scl-pin = <8>;
};
/* i2c of the right SFP+ cage as seen from the front: port 12 */
i2c0_1: i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
sda-pin = <10>;
scl-pin = <8>;
};
};
leds {
compatible = "gpio-leds";
@ -81,7 +45,7 @@
sfp0: sfp-p11 {
compatible = "sff,sfp";
i2c-bus = <&i2c0_0>;
i2c-bus = <&i2c0>;
los-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
tx-fault-gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio0 12 GPIO_ACTIVE_LOW>;
@ -90,7 +54,7 @@
sfp1: sfp-p12 {
compatible = "sff,sfp";
i2c-bus = <&i2c0_1>;
i2c-bus = <&i2c1>;
los-gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
tx-fault-gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio0 16 GPIO_ACTIVE_LOW>;
@ -122,6 +86,20 @@
};
};
&i2c_mst1 {
status = "okay";
/* i2c of the left SFP+ cage seen from the front; port 11 */
i2c0: i2c@0 {
reg = <0>;
};
/* i2c of the right SFP+ cage seen from the front; port 12 */
i2c1: i2c@1 {
reg = <1>;
};
};
&spi0 {
status = "okay";
flash@0 {

20
target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12.dts
View File

@ -29,17 +29,6 @@
};
};
/* i2c of the SFP cage: port 12 */
i2c0: i2c-rtl9300@1b00036c {
compatible = "realtek,rtl9300-i2c";
reg = <0x1b00036c 0x3c>;
#address-cells = <1>;
#size-cells = <0>;
sda-pin = <10>;
scl-pin = <8>;
clock-frequency = <100000>;
};
leds {
compatible = "gpio-leds";
@ -174,6 +163,15 @@
};
};
&i2c_mst1 {
status = "okay";
/* i2c of the SFP+ cage; port 12 */
i2c0: i2c@1 {
reg = <1>;
};
};
&spi0 {
status = "okay";
flash@0 {

95
target/linux/realtek/dts/rtl9303_tplink_tl-st1008f_v2.dts
View File

@ -71,71 +71,6 @@
};
};
i2c_main: i2c@1b00036c {
compatible = "realtek,rtl9300-i2c";
reg = <0x1b00036c 0x3c>;
#address-cells = <1>;
#size-cells = <0>;
scl-pin = <8>;
sda-pin = <9>;
clock-frequency = <100000>;
};
i2c-mux {
compatible = "realtek,i2c-mux-rtl9300";
i2c-parent = <&i2c_main>;
#address-cells = <1>;
#size-cells = <0>;
i2c0: i2c@0 {
reg = <0>;
scl-pin = <8>;
sda-pin = <9>;
};
i2c1: i2c@1 {
reg = <1>;
scl-pin = <8>;
sda-pin = <10>;
};
i2c2: i2c@2 {
reg = <2>;
scl-pin = <8>;
sda-pin = <11>;
};
i2c3: i2c@3 {
reg = <3>;
scl-pin = <8>;
sda-pin = <12>;
};
i2c4: i2c@4 {
reg = <4>;
scl-pin = <8>;
sda-pin = <13>;
};
i2c5: i2c@5 {
reg = <5>;
scl-pin = <8>;
sda-pin = <14>;
};
i2c6: i2c@6 {
reg = <6>;
scl-pin = <8>;
sda-pin = <15>;
};
i2c7: i2c@7 {
reg = <7>;
scl-pin = <8>;
sda-pin = <16>;
};
};
sfp0: sfp-p1 {
compatible = "sff,sfp";
i2c-bus = <&i2c0>;
@ -217,6 +152,36 @@
};
};
&i2c_mst1 {
status = "okay";
/* SDA0-7 correspond to GPIO9-16 */
i2c0: i2c@0 {
reg = <0>;
};
i2c1: i2c@1 {
reg = <1>;
};
i2c2: i2c@2 {
reg = <2>;
};
i2c3: i2c@3 {
reg = <3>;
};
i2c4: i2c@4 {
reg = <4>;
};
i2c5: i2c@5 {
reg = <5>;
};
i2c6: i2c@6 {
reg = <6>;
};
i2c7: i2c@7 {
reg = <7>;
};
};
&spi0 {
status = "okay";

95
target/linux/realtek/dts/rtl9303_vimin_vm-s100-0800ms.dts
View File

@ -20,71 +20,6 @@
stdout-path = "serial0:115200n8";
};
i2c_master: i2c@1b00036c {
compatible = "realtek,rtl9300-i2c";
reg = <0x1b00036c 0x3c>;
#address-cells = <1>;
#size-cells = <0>;
scl-pin = <8>;
sda-pin = <9>;
clock-frequency = <100000>;
};
i2c-mux {
compatible = "realtek,i2c-mux-rtl9300";
i2c-parent = <&i2c_master>;
#address-cells = <1>;
#size-cells = <0>;
i2c0: i2c@0 {
reg = <0>;
scl-pin = <8>;
sda-pin = <9>;
};
i2c1: i2c@1 {
reg = <1>;
scl-pin = <8>;
sda-pin = <10>;
};
i2c2: i2c@2 {
reg = <2>;
scl-pin = <8>;
sda-pin = <11>;
};
i2c3: i2c@3 {
reg = <3>;
scl-pin = <8>;
sda-pin = <12>;
};
i2c4: i2c@4 {
reg = <4>;
scl-pin = <8>;
sda-pin = <13>;
};
i2c5: i2c@5 {
reg = <5>;
scl-pin = <8>;
sda-pin = <14>;
};
i2c6: i2c@6 {
reg = <6>;
scl-pin = <8>;
sda-pin = <15>;
};
i2c7: i2c@7 {
reg = <7>;
scl-pin = <8>;
sda-pin = <16>;
};
};
keys {
compatible = "gpio-keys";
@ -188,6 +123,36 @@
};
};
&i2c_mst1 {
status = "okay";
/* SDA0-7 correspond to GPIO9-16 */
i2c0: i2c@0 {
reg = <0>;
};
i2c1: i2c@1 {
reg = <1>;
};
i2c2: i2c@2 {
reg = <2>;
};
i2c3: i2c@3 {
reg = <3>;
};
i2c4: i2c@4 {
reg = <4>;
};
i2c5: i2c@5 {
reg = <5>;
};
i2c6: i2c@6 {
reg = <6>;
};
i2c7: i2c@7 {
reg = <7>;
};
};
&mdio_aux {
status = "okay";

95
target/linux/realtek/dts/rtl9303_xikestor_sks8300-8x.dts
View File

@ -27,71 +27,6 @@
stdout-path = "serial0:9600n8";
};
i2c_master: i2c@1b00036c {
compatible = "realtek,rtl9300-i2c";
reg = <0x1b00036c 0x3c>;
#address-cells = <1>;
#size-cells = <0>;
scl-pin = <8>;
sda-pin = <9>;
clock-frequency = <100000>;
};
i2c-mux {
compatible = "realtek,i2c-mux-rtl9300";
i2c-parent = <&i2c_master>;
#address-cells = <1>;
#size-cells = <0>;
i2c0: i2c@0 {
reg = <0>;
scl-pin = <8>;
sda-pin = <9>;
};
i2c1: i2c@1 {
reg = <1>;
scl-pin = <8>;
sda-pin = <10>;
};
i2c2: i2c@2 {
reg = <2>;
scl-pin = <8>;
sda-pin = <11>;
};
i2c3: i2c@3 {
reg = <3>;
scl-pin = <8>;
sda-pin = <12>;
};
i2c4: i2c@4 {
reg = <4>;
scl-pin = <8>;
sda-pin = <13>;
};
i2c5: i2c@5 {
reg = <5>;
scl-pin = <8>;
sda-pin = <14>;
};
i2c6: i2c@6 {
reg = <6>;
scl-pin = <8>;
sda-pin = <15>;
};
i2c7: i2c@7 {
reg = <7>;
scl-pin = <8>;
sda-pin = <16>;
};
};
keys {
compatible = "gpio-keys";
@ -206,6 +141,36 @@
};
};
&i2c_mst1 {
status = "okay";
/* SDA0-7 correspond to GPIO9-16 */
i2c0: i2c@0 {
reg = <0>;
};
i2c1: i2c@1 {
reg = <1>;
};
i2c2: i2c@2 {
reg = <2>;
};
i2c3: i2c@3 {
reg = <3>;
};
i2c4: i2c@4 {
reg = <4>;
};
i2c5: i2c@5 {
reg = <5>;
};
i2c6: i2c@6 {
reg = <6>;
};
i2c7: i2c@7 {
reg = <7>;
};
};
&mdio_aux {
status = "okay";

18
target/linux/realtek/dts/rtl930x.dtsi
View File

@ -167,6 +167,24 @@
compatible = "syscon", "simple-mfd";
reg = <0x1b000000 0x10000>;
i2c_mst1: i2c@36c {
compatible = "realtek,rtl9301-i2c";
reg = <0x36c 0x18>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c_mst2: i2c@388 {
compatible = "realtek,rtl9301-i2c";
reg = <0x388 0x18>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
mdio_aux: mdio-aux {
compatible = "realtek,rtl9300-aux-mdio";
#address-cells = <1>;

20
target/linux/realtek/dts/rtl931x.dtsi
View File

@ -197,6 +197,26 @@
switchcore@1b000000 {
compatible = "syscon", "simple-mfd";
reg = <0x1b000000 0x10000>;
i2c_mst1: i2c@100c {
compatible = "realtek,rtl9310-i2c";
reg = <0x100c 0x18>;
#address-cells = <1>;
#size-cells = <0>;
realtek,scl = <0>;
status = "disabled";
};
i2c_mst2: i2c@1024 {
compatible = "realtek,rtl9310-i2c";
reg = <0x1024 0x18>;
#address-cells = <1>;
#size-cells = <0>;
realtek,scl = <1>;
status = "disabled";
};
};
pinmux: pinmux@1b001358 {