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	mcs814x: fix interrupt handling
Switch to generich chip irqs/irq domains. Interrupts were broken since kernel 3.14. dLAN USB extender is now booting again. Signed-off-by: Günther Kelleter <guenther.kelleter@devolo.de> SVN-Revision: 46647
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				@ -17,6 +17,7 @@
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#include <mach/mcs814x.h>
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static void __iomem *mcs814x_intc_base;
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static struct irq_domain *domain;
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static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
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					unsigned int num)
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@ -24,11 +25,15 @@ static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
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	struct irq_chip_generic *gc;
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	struct irq_chip_type *ct;
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	gc = irq_alloc_generic_chip("mcs814x-intc", 1,
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			irq_start, base, handle_level_irq);
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	if (!gc)
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		panic("unable to allocate generic irq chip");
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	if (irq_alloc_domain_generic_chips(domain, num, 1, "mcs814x-intc", handle_level_irq,
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                IRQ_GC_INIT_MASK_CACHE, IRQ_NOREQUEST, 0))
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		panic("unable to allocate domain generic irq chip");
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	gc = irq_get_domain_generic_chip(domain, irq_start);
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	if (!gc)
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		panic("unable to get generic irq chip");
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	gc->reg_base = base;
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	ct = gc->chip_types;
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	ct->chip.irq_ack = irq_gc_unmask_enable_reg;
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	ct->chip.irq_mask = irq_gc_mask_clr_bit;
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@ -36,9 +41,6 @@ static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
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	ct->regs.mask = MCS814X_IRQ_MASK;
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	ct->regs.enable = MCS814X_IRQ_ICR;
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	irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
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		IRQ_NOREQUEST, 0);
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	/* Clear all interrupts */
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	writel_relaxed(0xffffffff, base + MCS814X_IRQ_ICR);
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}
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@ -58,7 +60,7 @@ asmlinkage void __exception_irq_entry mcs814x_handle_irq(struct pt_regs *regs)
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		/* clear the interrupt */
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		__raw_writel(status, mcs814x_intc_base + MCS814X_IRQ_STS0);
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		/* call the generic handler */
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		handle_IRQ(irq, regs);
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		handle_domain_irq(domain, irq, regs);
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	} while (1);
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}
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@ -80,7 +82,10 @@ void __init mcs814x_of_irq_init(void)
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	if (!mcs814x_intc_base)
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		panic("unable to map intc cpu registers\n");
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	irq_domain_add_simple(np, 32, 0, &irq_generic_chip_ops, NULL);
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	domain = irq_domain_add_linear(np, 32, &irq_generic_chip_ops, NULL);
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	if (!domain)
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		panic("unable to add irq domain\n");
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	irq_set_default_host(domain);
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	of_node_put(np);
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@ -15,6 +15,7 @@
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <asm/mach/time.h>
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#include <mach/mcs814x.h>
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@ -71,21 +72,15 @@ static irqreturn_t mcs814x_timer_interrupt(int irq, void *dev_id)
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	return IRQ_HANDLED;
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}
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static struct irqaction mcs814x_timer_irq = {
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	.name		= "mcs814x-timer",
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	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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	.handler	= mcs814x_timer_interrupt,
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};
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static struct of_device_id mcs814x_timer_ids[] = {
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	{ .compatible = "moschip,mcs814x-timer" },
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	{ /* sentinel */ },
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};
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static void __init mcs814x_of_timer_init(void)
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static int __init mcs814x_of_timer_init(void)
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{
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	struct device_node *np;
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	const unsigned int *intspec;
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	int irq;
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	np = of_find_matching_node(NULL, mcs814x_timer_ids);
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	if (!np)
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@ -95,16 +90,17 @@ static void __init mcs814x_of_timer_init(void)
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	if (!mcs814x_timer_base)
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		panic("unable to remap timer cpu registers");
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	intspec = of_get_property(np, "interrupts", NULL);
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	if (!intspec)
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		panic("no interrupts property for timer");
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	irq = irq_of_parse_and_map(np, 0);
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	if (!irq)
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		panic("no interrupts property/mapping failed for timer");
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	mcs814x_timer_irq.irq = be32_to_cpup(intspec);
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	return irq;
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}
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void __init mcs814x_timer_init(void)
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{
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	struct clk *clk;
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	int irq;
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	arch_gettimeoffset = mcs814x_gettimeoffset;
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@ -114,7 +110,7 @@ void __init mcs814x_timer_init(void)
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	clock_rate = clk_get_rate(clk);
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	mcs814x_of_timer_init();
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	irq = mcs814x_of_timer_init();
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	pr_info("Timer frequency: %d (kHz)\n", clock_rate / 1000);
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@ -125,7 +121,11 @@ void __init mcs814x_timer_init(void)
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	writel_relaxed(timer_reload_value, mcs814x_timer_base + TIMER_VAL);
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	last_reload = timer_reload_value;
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	setup_irq(mcs814x_timer_irq.irq, &mcs814x_timer_irq);
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	if (request_irq(irq, mcs814x_timer_interrupt,
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		IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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		"mcs814x-timer", NULL))
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		panic("unable to request timer0 irq %d", irq);
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	/* enable timer, stop timer in debug mode */
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	writel_relaxed(TIMER_CTL_EN | TIMER_CTL_DBG,
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		mcs814x_timer_base + TIMER_CTL);
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