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	bcm53xx: MR32: replace i2c-gpio with SoC's i2c
During review of the MR32, Florian Fainelli pointed out that the SoC has a real I2C-controller. Furthermore, the connected pins (SDA and SCL) would line up perfectly for use. This patch swaps out the the bitbanged i2c-gpio with the real deal. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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				@ -318,7 +318,7 @@ TARGET_DEVICES += luxul_xwr-3150
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define Device/meraki_mr32
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  DEVICE_VENDOR := Meraki
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  DEVICE_MODEL := MR32
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  DEVICE_PACKAGES := $(B43) kmod-i2c-bcm-iproc kmod-i2c-gpio kmod-eeprom-at24 \
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  DEVICE_PACKAGES := $(B43) kmod-i2c-bcm-iproc kmod-eeprom-at24 \
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	kmod-leds-pwm kmod-hwmon-ina2xx kmod-bluetooth
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  DEVICE_DTS := bcm53016-meraki-mr32
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# Meraki FW r23 tries to resize the part.safe partition before it will
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@ -0,0 +1,32 @@
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From beda1bbdb19baa8319ed81fa370fe0c5b91d05df Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <f.fainelli@gmail.com>
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Date: Tue, 26 Oct 2021 11:36:22 -0700
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Subject: [PATCH] ARM: dts: BCM5301X: Fix I2C controller interrupt
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The I2C interrupt controller line is off by 32 because the datasheet
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describes interrupt inputs into the GIC which are for Shared Peripheral
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Interrupts and are starting at offset 32. The ARM GIC binding expects
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the SPI interrupts to be numbered from 0 relative to the SPI base.
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Fixes: bb097e3e0045 ("ARM: dts: BCM5301X: Add I2C support to the DT")
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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 arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
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 1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
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index f92089290ccd..ec5de636796e 100644
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--- a/arch/arm/boot/dts/bcm5301x.dtsi
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+++ b/arch/arm/boot/dts/bcm5301x.dtsi
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@@ -408,7 +408,7 @@ uart2: serial@18008000 {
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 	i2c0: i2c@18009000 {
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 		compatible = "brcm,iproc-i2c";
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 		reg = <0x18009000 0x50>;
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-		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
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+		interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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 		#address-cells = <1>;
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 		#size-cells = <0>;
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 		clock-frequency = <100000>;
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-- 
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2.25.1
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@ -0,0 +1,85 @@
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From: Christian Lamparter <chunkeey@gmail.com>
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Date: Sat, 12 Sep 2020 22:11:12 +0200
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Subject: bcm53xx: Meraki MR32 use hw i2c
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replace the i2c-gpio provided i2c functionality with the
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hardware in the SoC. This can be activated once the
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internal i2c works as well as the bit-banged i2c-gpio.
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Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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--- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
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+++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
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@@ -85,40 +85,6 @@
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 			max-brightness = <255>;
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 		};
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 	};
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-
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-	i2c {
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-		/*
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-		 * The platform provided I2C does not budge.
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-		 * This is a replacement until I can figure
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-		 * out what are the missing bits...
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-		 */
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-
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-		compatible = "i2c-gpio";
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-		sda-gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
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-		scl-gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
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-		i2c-gpio,delay-us = <10>; /* close to 100 kHz */
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-		#address-cells = <1>;
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-		#size-cells = <0>;
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-
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-		current_sense: ina219@45 {
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-			compatible = "ti,ina219";
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-			reg = <0x45>;
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-			shunt-resistor = <60000>; /* = 60 mOhms */
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-		};
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-
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-		eeprom: eeprom@50 {
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-			compatible = "atmel,24c64";
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-			reg = <0x50>;
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-			pagesize = <32>;
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-			read-only;
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-			#address-cells = <1>;
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-			#size-cells = <1>;
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-
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-			mac_address: mac-address@66 {
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-				reg = <0x66 0x6>;
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-			};
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-		};
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-	};
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 };
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 &uart0 {
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@@ -196,3 +168,31 @@
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 		};
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 	};
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 };
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+
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+&i2c0 {
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+	status = "okay";
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+
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+	pinctrl-names = "default";
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+	pinctrl-0 = <&pinmux_i2c>;
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+
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+	clock-frequency = <100000>;
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+
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+	current_sense: ina219@45 {
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+		compatible = "ti,ina219";
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+		reg = <0x45>;
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+		shunt-resistor = <60000>; /* = 60 mOhms */
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+	};
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+
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+	eeprom: eeprom@50 {
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+		compatible = "atmel,24c64";
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+		reg = <0x50>;
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+		pagesize = <32>;
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+		read-only;
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+		#address-cells = <1>;
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+		#size-cells = <1>;
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+
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+		mac_address: mac-address@66 {
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+			reg = <0x66 0x6>;
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+		};
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+	};
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+};
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