treewide: fix coccinelle checks

Unneeded semicolon

WARNING comparing pointer to 0

WARNING: NULL check before some freeing functions is not needed.

WARNING: casting value returned by memory allocation function to (u32 *)

ERROR: allocation function on line 378 returns NULL not ERR_PTR on failure

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19932
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Rosen Penev 2024-11-03 14:11:30 -08:00 committed by Hauke Mehrtens
parent 55b5e44673
commit 4ffd5aa239
42 changed files with 102 additions and 125 deletions

View File

@ -1286,8 +1286,7 @@ IFX_MEI_RunAdslModem (DSL_DEV_Device_t *pDev)
// DSL_DEV_WinHost_Message_t m;
if (mei_arc_swap_buff == NULL) {
mei_arc_swap_buff =
(u32 *) kmalloc (MAXSWAPSIZE * 4, GFP_KERNEL);
mei_arc_swap_buff = kmalloc (MAXSWAPSIZE * 4, GFP_KERNEL);
if (mei_arc_swap_buff == NULL) {
IFX_MEI_EMSG (">>> malloc fail for codeswap buff!!! <<<\n");
return DSL_DEV_MEI_ERR_FAILURE;

View File

@ -418,7 +418,7 @@ typedef struct _arc_img_hdr {
u32 size; // Size of binary image in bytes
u32 checksum; // Checksum for image
u32 count; // Count of swp pages in image
ARC_SWP_PAGE_HDR page[1]; // Should be "count" pages - '1' to make compiler happy
ARC_SWP_PAGE_HDR page[]; // Should be "count" pages - '1' to make compiler happy
} ARC_IMG_HDR;
typedef struct smmu_mem_info {

View File

@ -224,8 +224,8 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len,
{
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )

View File

@ -163,8 +163,8 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len,
{
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )

View File

@ -110,8 +110,8 @@ static inline int danube_pp32_download_code(u32 *code_src, unsigned int code_dwo
{
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )

View File

@ -96,8 +96,8 @@ static inline int vr9_pp32_download_code(int pp32, u32 *code_src, unsigned int c
unsigned int clr, set;
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
clr = pp32 ? 0xF0 : 0x0F;

View File

@ -1503,17 +1503,10 @@ static inline void clear_priv_data(void)
}
}
if ( g_atm_priv_data.tx_skb_base != NULL )
kfree(g_atm_priv_data.tx_skb_base);
if ( g_atm_priv_data.tx_desc_base != NULL )
kfree(g_atm_priv_data.tx_desc_base);
if ( g_atm_priv_data.oam_buf_base != NULL )
kfree(g_atm_priv_data.oam_buf_base);
if ( g_atm_priv_data.oam_desc_base != NULL )
kfree(g_atm_priv_data.oam_desc_base);
kfree(g_atm_priv_data.tx_skb_base);
kfree(g_atm_priv_data.tx_desc_base);
kfree(g_atm_priv_data.oam_buf_base);
kfree(g_atm_priv_data.oam_desc_base);
if ( g_atm_priv_data.aal_desc_base != NULL ) {
for ( i = 0; i < dma_rx_descriptor_length; i++ ) {
@ -1522,8 +1515,9 @@ static inline void clear_priv_data(void)
dev_kfree_skb_any(skb);
}
}
kfree(g_atm_priv_data.aal_desc_base);
}
kfree(g_atm_priv_data.aal_desc_base);
}
static inline void init_rx_tables(void)

View File

@ -276,7 +276,7 @@ void ifx_deu_aes (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
aes->IV2R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
aes->IV1R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 2));
aes->IV0R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 3));
};
}
i = 0;
@ -1529,7 +1529,7 @@ static int aes_cbcmac_init_tfm(struct crypto_tfm *tfm)
{
struct aes_ctx *mctx = crypto_tfm_ctx(tfm);
mctx->temp = kzalloc(AES_BLOCK_SIZE * AES_CBCMAC_DBN_TEMP_SIZE, GFP_KERNEL);
if (IS_ERR(mctx->temp)) return PTR_ERR(mctx->temp);
if (!mctx->temp) return -ENOMEM;
return 0;
}

View File

@ -234,7 +234,7 @@ static int lq_deu_aes_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
aes->IV2R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
aes->IV1R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 2));
aes->IV0R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 3));
};
}
/* Prepare Rx buf length used in dma psuedo interrupt */
@ -251,7 +251,7 @@ static int lq_deu_aes_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
while (aes->controlr.BUS) {
// wait for AES to be ready
};
}
deu_priv->outcopy = (u32 *) DEU_DWORD_REORDERING(out_arg, aes_buff_out, BUFFER_OUT, nbytes);
deu_priv->event_src = AES_ASYNC_EVENT;
@ -576,10 +576,7 @@ static int lq_aes_queue_mgr(struct aes_ctx *ctx, struct ablkcipher_request *areq
u32 remain, inc, nbytes = areq->nbytes;
u32 chunk_bytes = src->length;
aes_con = (struct aes_container *)kmalloc(sizeof(struct aes_container),
GFP_KERNEL);
aes_con = kmalloc(sizeof(struct aes_container), GFP_KERNEL);
if (!(aes_con)) {
printk("Cannot allocate memory for AES container, fn %s, ln %d\n",
__func__, __LINE__);

View File

@ -254,7 +254,7 @@ static int lq_deu_des_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
if (mode > 0) {
des->IVHR = DEU_ENDIAN_SWAP(*(u32 *) iv_arg);
des->IVLR = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
};
}
/* memory alignment issue */
dword_mem_aligned_in = (u32 *) DEU_DWORD_REORDERING(in_arg, des_buff_in, BUFFER_IN, nbytes);
@ -268,7 +268,7 @@ static int lq_deu_des_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
dma->controlr.EN = 1;
while (des->controlr.BUS) {
};
}
wlen = dma_device_write (dma_device, (u8 *) dword_mem_aligned_in, nbytes, NULL);
if (wlen != nbytes) {
@ -287,7 +287,7 @@ static int lq_deu_des_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
if (mode > 0) {
*(u32 *) iv_arg = DEU_ENDIAN_SWAP(des->IVHR);
*((u32 *) iv_arg + 1) = DEU_ENDIAN_SWAP(des->IVLR);
};
}
CRTCL_SECT_END;
@ -578,9 +578,7 @@ static int lq_queue_mgr(struct des_ctx *ctx, struct ablkcipher_request *areq,
u32 remain, inc, nbytes = areq->nbytes;
u32 chunk_bytes = src->length;
des_con = (struct des_container *)kmalloc(sizeof(struct des_container),
GFP_KERNEL);
des_con = kmalloc(sizeof(struct des_container), GFP_KERNEL);
if (!(des_con)) {
printk("Cannot allocate memory for AES container, fn %s, ln %d\n",
__func__, __LINE__);

View File

@ -229,7 +229,7 @@ void ifx_deu_des (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
if (mode > 0) {
des->IVHR = DEU_ENDIAN_SWAP(*(u32 *) iv_arg);
des->IVLR = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
};
}
nblocks = nbytes / 4;
@ -260,7 +260,7 @@ void ifx_deu_des (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
if (mode > 0) {
*(u32 *) iv_arg = DEU_ENDIAN_SWAP(des->IVHR);
*((u32 *) iv_arg + 1) = DEU_ENDIAN_SWAP(des->IVLR);
};
}
CRTCL_SECT_END;
}

View File

@ -87,8 +87,8 @@
volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
for (i = 0; i < 10; i++) \
udelay(DELAY_PERIOD); \
while (dma->controlr.BSY) {}; \
while (aes->controlr.BUS) {}; \
while (dma->controlr.BSY) {} \
while (aes->controlr.BUS) {} \
} while (0)
#define WAIT_DES_DMA_READY() \
@ -98,8 +98,8 @@
volatile struct des_t *des = (struct des_t *) DES_3DES_START; \
for (i = 0; i < 10; i++) \
udelay(DELAY_PERIOD); \
while (dma->controlr.BSY) {}; \
while (des->controlr.BUS) {}; \
while (dma->controlr.BSY) {} \
while (des->controlr.BUS) {} \
} while (0)
#define AES_DMA_MISC_CONFIG() \

View File

@ -81,8 +81,8 @@
volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
for (i = 0; i < 10; i++) \
udelay(DELAY_PERIOD); \
while (dma->controlr.BSY) {}; \
while (aes->controlr.BUS) {}; \
while (dma->controlr.BSY) {} \
while (aes->controlr.BUS) {} \
} while (0)
#define WAIT_DES_DMA_READY() \
@ -92,8 +92,8 @@
volatile struct des_t *des = (struct des_t *) DES_3DES_START; \
for (i = 0; i < 10; i++) \
udelay(DELAY_PERIOD); \
while (dma->controlr.BSY) {}; \
while (des->controlr.BUS) {}; \
while (dma->controlr.BSY) {} \
while (des->controlr.BUS) {} \
} while (0)
#define SHA_HASH_INIT \

View File

@ -102,8 +102,8 @@
volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
for (i = 0; i < 10; i++) \
udelay(DELAY_PERIOD); \
while (dma->controlr.BSY) {}; \
while (aes->controlr.BUS) {}; \
while (dma->controlr.BSY) {} \
while (aes->controlr.BUS) {} \
} while (0)
#define WAIT_DES_DMA_READY() \
@ -113,8 +113,8 @@
volatile struct des_t *des = (struct des_t *) DES_3DES_START; \
for (i = 0; i < 10; i++) \
udelay(DELAY_PERIOD); \
while (dma->controlr.BSY) {}; \
while (des->controlr.BUS) {}; \
while (dma->controlr.BSY) {} \
while (des->controlr.BUS) {} \
} while (0)
#define AES_DMA_MISC_CONFIG() \

View File

@ -107,7 +107,7 @@ static void md5_transform(struct md5_ctx *mctx, u32 *hash, u32 const *in)
for (i = 0; i < 16; i++) {
hashs->MR = in[i];
// printk("in[%d]: %08x\n", i, in[i]);
};
}
//wait for processing
while (hashs->controlr.BSY) {

View File

@ -308,7 +308,7 @@ static int md5_hmac_final_impl(struct shash_desc *desc, u8 *out, bool hash_final
{
for (i = 0; i < 16; i++) {
hashs->MR = in[i];
};
}
hashs->controlr.GO = 1;
asm("sync");
@ -355,9 +355,9 @@ static int md5_hmac_init_tfm(struct crypto_tfm *tfm)
{
struct md5_hmac_ctx *mctx = crypto_tfm_ctx(tfm);
mctx->temp = kzalloc(4 * MD5_HMAC_DBN_TEMP_SIZE, GFP_KERNEL);
if (IS_ERR(mctx->temp)) return PTR_ERR(mctx->temp);
if (!mctx->temp) return -ENOMEM;
mctx->desc = kzalloc(sizeof(struct shash_desc), GFP_KERNEL);
if (IS_ERR(mctx->desc)) return PTR_ERR(mctx->desc);
if (!mctx->desc) return -ENOMEM;
return 0;
}

View File

@ -119,7 +119,7 @@ static void sha1_transform1 (struct sha1_ctx *sctx, u32 *state, const u32 *in)
for (i = 0; i < 16; i++) {
hashs->MR = in[i];
};
}
//wait for processing
while (hashs->controlr.BSY) {

View File

@ -325,7 +325,7 @@ static int sha1_hmac_final_impl(struct shash_desc *desc, u8 *out, bool hash_fina
{
for (i = 0; i < 16; i++) {
hashs->MR = in[i];
};
}
hashs->controlr.GO = 1;
asm("sync");
@ -376,9 +376,9 @@ static int sha1_hmac_init_tfm(struct crypto_tfm *tfm)
{
struct sha1_hmac_ctx *sctx = crypto_tfm_ctx(tfm);
sctx->temp = kzalloc(4 * SHA1_HMAC_DBN_TEMP_SIZE, GFP_KERNEL);
if (IS_ERR(sctx->temp)) return PTR_ERR(sctx->temp);
if (!sctx->temp) return -ENOMEM;
sctx->desc = kzalloc(sizeof(struct shash_desc), GFP_KERNEL);
if (IS_ERR(sctx->desc)) return PTR_ERR(sctx->desc);
if (!sctx->desc) return -ENOMEM;
return 0;
}

View File

@ -1360,14 +1360,9 @@ static INLINE void clear_priv_data(void)
}
}
if ( g_ptm_priv_data.rx_desc_base != NULL )
kfree(g_ptm_priv_data.rx_desc_base);
if ( g_ptm_priv_data.tx_desc_base != NULL )
kfree(g_ptm_priv_data.tx_desc_base);
if ( g_ptm_priv_data.tx_skb_base != NULL )
kfree(g_ptm_priv_data.tx_skb_base);
kfree(g_ptm_priv_data.rx_desc_base);
kfree(g_ptm_priv_data.tx_desc_base);
kfree(g_ptm_priv_data.tx_skb_base);
}
static INLINE void init_tables(void)

View File

@ -223,8 +223,8 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len,
{
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )

View File

@ -246,8 +246,8 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len,
{
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )

View File

@ -218,8 +218,8 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len,
{
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )

View File

@ -207,8 +207,8 @@ static inline int pp32_download_code(int pp32, u32 *code_src, unsigned int code_
unsigned int clr, set;
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
clr = pp32 ? 0xF0 : 0x0F;

View File

@ -174,13 +174,13 @@ static int i2c_outb(int c)
if (sclhi() < 0) { /* timed out */
sdahi(); /* we don't want to block the net */
return -ETIMEDOUT;
};
}
scllo();
}
sdahi();
if (sclhi() < 0) {
return -ETIMEDOUT;
};
}
/* read ack: SDA should be pulled down by slave */
ack = getsda() == 0; /* ack: sda is pulled low ->success. */
scllo();
@ -204,7 +204,7 @@ static int i2c_inb(int ack)
for (i = 0; i < 8; i++) {
if (sclhi() < 0) {
return -ETIMEDOUT;
};
}
indata *= 2;
if (getsda())
indata |= 0x01;

View File

@ -273,7 +273,7 @@ static int number(int num, int base, int size,
putc(tmp[i]);
while (size-- > 0)
putc(' ');;
putc(' ');
return 1;
}

View File

@ -166,7 +166,7 @@ int read_dataflash(unsigned long addr, unsigned long size, char *result)
AT91PS_DataFlash pFlash = &DataFlashInst;
pFlash = AT91F_DataflashSelect (pFlash, &AddrToRead);
if (pFlash == 0)
if (!pFlash)
return -1;
return (AT91F_DataFlashRead(pFlash, AddrToRead, size, result));

View File

@ -1379,10 +1379,8 @@ static int ar934x_nfc_probe(struct platform_device *pdev)
}
nfc->irq = platform_get_irq(pdev, 0);
if (nfc->irq < 0) {
dev_err(&pdev->dev, "no IRQ resource specified\n");
if (nfc->irq < 0)
return -EINVAL;
}
init_waitqueue_head(&nfc->irq_waitq);
ret = devm_request_irq(&pdev->dev, nfc->irq, ar934x_nfc_irq_handler,

View File

@ -185,7 +185,6 @@ int RangeDecoderReverseBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder
{
int mi = 1;
int i;
int symbol = 0;
#ifdef _LZMA_LOC_OPT
RC_INIT_VAR
#endif
@ -203,7 +202,7 @@ int RangeDecoderReverseBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder
#ifdef _LZMA_LOC_OPT
RC_FLUSH_VAR
#endif
return symbol;
return 0;
}
Byte LzmaLiteralDecode(CProb *probs, CRangeDecoder *rd)

View File

@ -385,8 +385,7 @@ void mtk_bmt_detach(struct mtd_info *mtd)
if (bmtd.mtd != mtd)
return;
if (bmtd.debugfs_dir)
debugfs_remove_recursive(bmtd.debugfs_dir);
debugfs_remove_recursive(bmtd.debugfs_dir);
bmtd.debugfs_dir = NULL;
kfree(bmtd.bbt_buf);

View File

@ -810,7 +810,7 @@ static bool nmbm_write_signature(struct nmbm_instance *ni, uint32_t limit,
next_block:
ba--;
};
}
return false;
}
@ -2069,7 +2069,7 @@ static bool nmbm_find_signature(struct nmbm_instance *ni,
return true;
}
}
};
}
return false;
}

View File

@ -551,9 +551,11 @@ static int b53_configure_ports_of(struct b53_device *dev)
mode == PHY_INTERFACE_MODE_REVMII) {
b53_read8(dev, B53_CTRL_PAGE,
B53_PORT_OVERRIDE_CTRL, &po);
if (!(po & PORT_OVERRIDE_RV_MII_25))
pr_err("Failed to enable reverse MII mode\n");
return -EINVAL;
if (!(po & PORT_OVERRIDE_RV_MII_25)) {
pr_err("Failed to enable reverse MII mode\n");
of_node_put(dn);
return -EINVAL;
}
}
} else {
po |= GMII_PO_EN;
@ -845,7 +847,7 @@ static int b53_vlan_set_ports(struct switch_dev *dev, struct switch_val *val)
if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED))) {
vlan->untag |= BIT(port->id);
priv->ports[port->id].pvid = val->port_vlan;
};
}
}
/* ignore disabled ports */

View File

@ -1594,8 +1594,7 @@ static int rtl8367b_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, NULL);
rtl8366_smi_cleanup(smi);
err_free_smi:
if (smi->emu_vlanmc)
kfree(smi->emu_vlanmc);
kfree(smi->emu_vlanmc);
kfree(smi);
return err;
}

View File

@ -549,7 +549,7 @@ static int hc_wlan_data_unpack_lzor_lz77(const u16 tag_id, const u8 *inbuf, size
ret = -ENODATA;
goto fail;
}
};
}
templen -= (u8 *)needle - tempbuf;
/* Past magic. Look for tag node */

View File

@ -215,7 +215,7 @@ rtk_api_ret_t rtk_i2c_data_read(rtk_uint8 deviceAddr, rtk_uint32 slaveRegAddr, r
{
rtk_uint32 retVal, counter=0;
rtk_uint8 controlByte_W, controlByte_R;
rtk_uint8 slaveRegAddr_L, slaveRegAddr_H = 0x0, temp;
rtk_uint8 slaveRegAddr_L, slaveRegAddr_H = 0x0;
rtk_uint8 regData_L, regData_H;
/* control byte :deviceAddress + W, deviceAddress + R */
@ -226,11 +226,7 @@ rtk_api_ret_t rtk_i2c_data_read(rtk_uint8 deviceAddr, rtk_uint32 slaveRegAddr, r
slaveRegAddr_H = (rtk_uint8) (slaveRegAddr >>8) ;
if( rtk_i2c_mode == I2C_70B_LSB_16BIT_MODE)
{
temp = slaveRegAddr_L ;
slaveRegAddr_L = slaveRegAddr_H;
slaveRegAddr_H = temp;
}
swap(slaveRegAddr_L, slaveRegAddr_H);
/*check bus state: idle*/
@ -339,7 +335,7 @@ rtk_api_ret_t rtk_i2c_data_write(rtk_uint8 deviceAddr, rtk_uint32 slaveRegAddr,
{
rtk_uint32 retVal,counter;
rtk_uint8 controlByte_W;
rtk_uint8 slaveRegAddr_L, slaveRegAddr_H = 0x0, temp;
rtk_uint8 slaveRegAddr_L, slaveRegAddr_H = 0x0;
rtk_uint8 regData_L, regData_H;
/* control byte :deviceAddress + W */
@ -352,11 +348,7 @@ rtk_api_ret_t rtk_i2c_data_write(rtk_uint8 deviceAddr, rtk_uint32 slaveRegAddr,
regData_L = (rtk_uint8) (regData & 0x00FF);
if( rtk_i2c_mode == I2C_70B_LSB_16BIT_MODE)
{
temp = slaveRegAddr_L ;
slaveRegAddr_L = slaveRegAddr_H;
slaveRegAddr_H = temp;
}
swap(slaveRegAddr_L, slaveRegAddr_H);
/*check bus state: idle*/

View File

@ -233,7 +233,7 @@ ret_t rtl8367c_setAsicPriorityDecision(rtk_uint32 index, rtk_uint32 prisrc, rtk_
break;
default:
break;
};
}
return RT_ERR_OK;
@ -278,7 +278,7 @@ ret_t rtl8367c_getAsicPriorityDecision(rtk_uint32 index, rtk_uint32 prisrc, rtk_
break;
default:
break;
};
}
return RT_ERR_OK;

View File

@ -1458,7 +1458,7 @@ MODULE_DEVICE_TABLE(of, ralink_esw_match);
int rt3050_esw_init(struct fe_priv *priv)
{
struct device_node *np = priv->switch_np;
struct platform_device *pdev = of_find_device_by_node(np);
struct platform_device *pdev;
struct switch_dev *swdev;
struct rt305x_esw *esw;
const __be32 *rgmii;
@ -1470,9 +1470,12 @@ int rt3050_esw_init(struct fe_priv *priv)
if (!of_device_is_compatible(np, ralink_esw_match->compatible))
return -EINVAL;
pdev = of_find_device_by_node(np);
esw = platform_get_drvdata(pdev);
if (!esw)
if (!esw) {
put_device(&pdev->dev);
return -EPROBE_DEFER;
}
priv->soc->swpriv = esw;
esw->priv = priv;
@ -1488,6 +1491,7 @@ int rt3050_esw_init(struct fe_priv *priv)
dev_err(&pdev->dev, "RGMII mode, not exporting switch device.\n");
unregister_switch(&esw->swdev);
platform_set_drvdata(pdev, NULL);
put_device(&pdev->dev);
return -ENODEV;
}

View File

@ -206,18 +206,19 @@ int mtk_gsw_init(struct fe_priv *priv)
struct device_node *eth_node = priv->dev->of_node;
struct device_node *phy_node, *mdiobus_node;
struct device_node *np = priv->switch_np;
struct platform_device *pdev = of_find_device_by_node(np);
struct platform_device *pdev;
struct mt7620_gsw *gsw;
const __be32 *id;
int ret;
u8 val;
if (!pdev)
return -ENODEV;
if (!of_device_is_compatible(np, mediatek_gsw_match->compatible))
return -EINVAL;
pdev = of_find_device_by_node(np);
if (!pdev)
return -ENODEV;
gsw = platform_get_drvdata(pdev);
priv->soc->swpriv = gsw;
@ -249,12 +250,14 @@ int mtk_gsw_init(struct fe_priv *priv)
ret = devm_request_irq(&pdev->dev, gsw->irq, gsw_interrupt_mt7620, 0,
"gsw", priv);
if (ret) {
put_device(&pdev->dev);
dev_err(&pdev->dev, "Failed to request irq");
return ret;
}
mtk_switch_w32(gsw, ~PORT_IRQ_ST_CHG, GSW_REG_IMR);
}
put_device(&pdev->dev);
return 0;
}

View File

@ -268,6 +268,6 @@ void fe_mdio_cleanup(struct fe_priv *priv)
return;
mdiobus_unregister(priv->mii_bus);
of_node_put(priv->mii_bus->dev.of_node);
put_device(&priv->mii_bus->dev);
kfree(priv->mii_bus);
}

View File

@ -1555,10 +1555,8 @@ static int fe_probe(struct platform_device *pdev)
netdev->base_addr = (unsigned long)fe_base;
netdev->irq = platform_get_irq(pdev, 0);
if (netdev->irq < 0) {
dev_err(&pdev->dev, "no IRQ resource found\n");
if (netdev->irq < 0)
return -ENXIO;
}
priv = netdev_priv(netdev);
spin_lock_init(&priv->page_lock);

View File

@ -492,7 +492,7 @@ static int rtcl_ccu_create(struct device_node *np)
return -ENXIO;
rtcl_ccu = kzalloc(sizeof(*rtcl_ccu), GFP_KERNEL);
if (IS_ERR(rtcl_ccu))
if (!rtcl_ccu)
return -ENOMEM;
rtcl_ccu->np = np;
@ -657,6 +657,7 @@ static int rtcl_init_sram(void)
rtcl_ccu->sram.pmark = (int *)((void *)sram_pbase + (dram_size - 4));
rtcl_ccu->sram.vbase = sram_vbase;
put_device(&pdev->dev);
return 0;
err_put_device:

View File

@ -356,6 +356,7 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
sprintf(led_set_str, "led_set%d", led_set);
priv->ports[pn].leds_on_this_port = of_property_count_u32_elems(led_node, led_set_str);
if (priv->ports[pn].leds_on_this_port > 4) {
of_node_put(dn);
dev_err(priv->dev, "led_set %d for port %d configuration is invalid\n", led_set, pn);
return -ENODEV;
}

View File

@ -1753,10 +1753,8 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev)
/* Obtain device IRQ number */
dev->irq = platform_get_irq(pdev, 0);
if (dev->irq < 0) {
dev_err(&pdev->dev, "cannot obtain network-device IRQ\n");
return err;
}
if (dev->irq < 0)
return -ENODEV;
err = devm_request_irq(&pdev->dev, dev->irq, priv->r->net_irq,
IRQF_SHARED, dev->name, dev);