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mediatek: add support for CreatLentem CLT-R30B1
CreatLentem CLT-R30B1 is a wireless WiFi 6 router. This device uses the CLT-R30B1_0824_V1.1 board shared by EDUP RT2980, Dragonglass DXG21, and other diamond-shaped 5-antenna routers. Specification ------------- - SoC : MediaTek MT7981B dual-core ARM Cortex-A53 1.3 GHz - RAM : DDR3 256 MiB - Flash : SPI-NAND 128 MiB (ESMT F50L1G41LB) - WLAN : MediaTek MT7976CN dual-band WiFi 6 - 2.4 GHz : b/g/n/ax, MU-MIMO (2x 5 dBi antennas) - 5 GHz : a/n/ac/ax, MU-MIMO (3x 5 dBi antennas) - Ethernet : - LAN x3 : 10/100/1000 Mbps (MediaTek MT7531AE) - WAN x1 : 10/100/1000 Mbps (MT7981 internal PHY) - UART : through-hole on PCB - assignment : (RX), (TX), (GND), [3.3V] - settings : 115200n8 - Buttons x2 : Mesh/WPS, Reset - LEDs x2 : Status (Red, Green) - Power : 12 VDC, 1 A, 2.1*5.5 mm Important notes --------------- The device is supplied in two variants. The main difference is the size of the mtd5 (ubi) partition in the flash layout: 64M or 112M. 112M version: Has ImmortalWrt firmware installed with LuCI WebUI. 64M version: Has stock firmware based on OpenWrt, with the WaveLink/GL.iNet WebUI and older U-Boot compared to the 112M version. Flash instructions for 112M version ----------------------------------- Follow the standard OpenWrt sysupgrade procedure without saving data. Use the clt-r30b1-112m-squashfs-sysupgrade.bin image. All checks should pass - don't proceed if a "not supported" warning is issued. Flash instructions for 64M version ---------------------------------- WebUI Method: 1. Prepare the upgrade image with clt-r30b1-squashfs-sysupgrade.bin using the script: make_staged_upgrade_tar.sh or use the prepared image: staged_openwrt_upgrade.bin Downloaded from: https://github.com/andros-ua/owrt-misc/tree/main/clt-r30b1 2. Install the prepared image using the stock WebUI update page. 3. Press and hold the reset button after reboot to wipe the stock config and gain access. SSH Method: 1. Connect via SSH using dg:ivanlee credentials. 2. Upload the clt-r30b1-squashfs-sysupgrade.bin image. 3. Use the command: sysupgrade -n All checks should pass - don't proceed if a "not supported" warning is issued. Return to stock --------------- Flash a backup of the ubi mtdblock (mtd5) using the OpenWrt sysupgrade method. Recovery -------- Both variants: Connect UART and use the U-Boot menu to flash the firmware image or boot an OpenWrt initramfs image. 112M with newer U-Boot: Power on the router while pressing the mesh button for 3 seconds. The U-Boot Flash WebUI will be available at http://192.168.1.1 MAC Addresses: ------------------------------------------------------- | Interface | MAC | Source | ---------------|-------------------|------------------- | LAN | B4:4D:43:D1:xx:xx | Factory, 0x2A | | WAN | B4:4D:43:D1:xx:xx | Factory, 0x24 | | WLAN 2.4 GHz | B4:4D:43:D2:xx:xx | Factory, 0x4 | | WLAN 5 GHz | B4:4D:43:D2:xx:xx | Factory, 0x4 + 1 | ------------------------------------------------------- Signed-off-by: Andrii Kuiukoff <andros.ua@gmail.com> Link: https://github.com/openwrt/openwrt/pull/19534 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Andrii Kuiukoff
Hauke Mehrtens
parent
96be6d4f8a
commit
2fea2ede63
@ -0,0 +1,15 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7981b-creatlentem-clt-r30b1-common.dtsi"
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/ {
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model = "CreatLentem CLT-R30B1 (112M)";
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compatible = "creatlentem,clt-r30b1-112m", "mediatek,mt7981";
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};
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&partitions {
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partition@580000 {
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label = "ubi";
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reg = <0x0580000 0x7000000>;
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};
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};
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@ -0,0 +1,273 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include "mt7981b.dtsi"
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/ {
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aliases {
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led-boot = &led_status_red;
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led-failsafe = &led_status_red;
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led-running = &led_status_green;
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led-upgrade = &led_status_green;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_status_green: green {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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gpios = <&pio 11 GPIO_ACTIVE_LOW>;
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};
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led_status_red: red {
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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gpios = <&pio 12 GPIO_ACTIVE_LOW>;
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};
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};
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memory {
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reg = <0 0x40000000 0 0x10000000>;
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_24 0>;
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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label = "wan";
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phy-mode = "gmii";
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phy-handle = <&int_gbe_phy>;
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_2a 0>;
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};
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};
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&mdio_bus {
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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spi_nand@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-cal-enable;
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spi-cal-mode = "read-data";
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spi-cal-datalen = <7>;
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spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>;
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spi-cal-addrlen = <5>;
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spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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partitions: partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "BL2";
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reg = <0x0 0x100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x100000 0x80000>;
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};
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partition@180000 {
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label = "Factory";
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reg = <0x180000 0x200000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x1000>;
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};
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macaddr_factory_4: macaddr@4 {
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reg = <0x4 0x6>;
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compatible = "mac-base";
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#nvmem-cell-cells = <1>;
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};
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macaddr_factory_24: macaddr@24 {
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compatible = "mac-base";
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reg = <0x24 0x6>;
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#nvmem-cell-cells = <1>;
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};
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macaddr_factory_2a: macaddr@2a {
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compatible = "mac-base";
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reg = <0x2a 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@380000 {
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label = "FIP";
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reg = <0x380000 0x200000>;
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read-only;
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};
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};
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&pio {
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_4mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_4mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&wifi {
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#address-cells = <1>;
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#size-cells = <0>;
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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status = "okay";
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band@0 {
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reg = <0>;
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nvmem-cells = <&macaddr_factory_4 0>;
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nvmem-cell-names = "mac-address";
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};
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band@1 {
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reg = <1>;
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nvmem-cells = <&macaddr_factory_4 1>;
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nvmem-cell-names = "mac-address";
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};
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};
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20
target/linux/mediatek/dts/mt7981b-creatlentem-clt-r30b1.dts
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20
target/linux/mediatek/dts/mt7981b-creatlentem-clt-r30b1.dts
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7981b-creatlentem-clt-r30b1-common.dtsi"
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/ {
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model = "CreatLentem CLT-R30B1";
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compatible = "creatlentem,clt-r30b1", "mediatek,mt7981";
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};
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&partitions {
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partition@580000 {
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label = "ubi";
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reg = <0x0580000 0x4000000>;
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};
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partition@4580000 {
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label = "data";
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reg = <0x4580000 0x2000000>;
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};
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};
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@ -39,6 +39,8 @@ mediatek_setup_interfaces()
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cmcc,a10-stock|\
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cmcc,a10-ubootmod|\
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confiabits,mt7981|\
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creatlentem,clt-r30b1|\
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creatlentem,clt-r30b1-112m|\
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cudy,wr3000-v1|\
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jcg,q30-pro|\
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keenetic,kn-3811|\
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@ -256,6 +256,8 @@ platform_check_image() {
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fit_check_image "$1"
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return $?
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;;
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creatlentem,clt-r30b1|\
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creatlentem,clt-r30b1-112m|\
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nradio,c8-668gl)
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# tar magic `ustar`
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magic="$(dd if="$1" bs=1 skip=257 count=5 2>/dev/null)"
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@ -711,6 +711,41 @@ define Device/confiabits_mt7981
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endef
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TARGET_DEVICES += confiabits_mt7981
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define Device/creatlentem_clt-r30b1-common
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DEVICE_VENDOR := CreatLentem
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DEVICE_MODEL := CLT-R30B1
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DEVICE_ALT0_VENDOR := EDUP
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DEVICE_ALT0_MODEL := RT2980
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DEVICE_ALT1_VENDOR := Dragonglass
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DEVICE_ALT1_MODEL := DXG21
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DEVICE_DTS_DIR := ../dts
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DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
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UBINIZE_OPTS := -E 5
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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KERNEL_IN_UBI := 1
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IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
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endef
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define Device/creatlentem_clt-r30b1-112m
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DEVICE_VARIANT := 112M
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DEVICE_ALT0_VARIANT := 112M
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DEVICE_ALT1_VARIANT := 112M
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DEVICE_DTS := mt7981b-creatlentem-clt-r30b1-112m
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SUPPORTED_DEVICES += clt,r30b1 clt,r30b1-112m
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IMAGE_SIZE := 114688k
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$(call Device/creatlentem_clt-r30b1-common)
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endef
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TARGET_DEVICES += creatlentem_clt-r30b1-112m
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define Device/creatlentem_clt-r30b1
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DEVICE_DTS := mt7981b-creatlentem-clt-r30b1
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SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
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IMAGE_SIZE := 65536k
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$(call Device/creatlentem_clt-r30b1-common)
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endef
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TARGET_DEVICES += creatlentem_clt-r30b1
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define Device/cudy_ap3000outdoor-v1
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DEVICE_VENDOR := Cudy
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DEVICE_MODEL := AP3000 Outdoor
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