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mediatek: add support for WAVLINK WL-WN536AX6 Rev a
Product name: Wavlink WL-WN536AX6 Rev a "Mighty LX2" Product link: https://www.wavlink.com/en_us/product/WL-WN536AX6.html Specifications: SOC: MT7986AV RAM: 512MB DDR4 Flash: 128MB SPI NAND Ports: 4 LAN (1G) & 1 WAN (2.5G) WIFI: MT7976PN + MT7975N LEDs: 8 (STATUS, WIFI, WAN, LAN1, LAN2, LAN3, LAN4, PWR) USB: 1 (3.0) MAC table, same as stock firmware: LAN: 80:3F:5D:xx:xx:x1 partition "hw" at 0x44e (ASCII) WAN: 80:3F:5D:xx:xx:x2 partition "hw" at 0x460 (ASCII) 2G: 80:3F:5D:xx:xx:x3 5G: 80:3F:5D:xx:xx:x4 * Installation with OEM WebUI: Note: Make sure PC is connected on LAN1 port. The OEM firmware has an unknown root password and settings are kept after upgrading firmware. Therefore, a customized Openwrt firmware is needed to remove the root password on login, by adding `passwd -d root` to /etc/init.d/bootcount. The WebUI does a filename check so the customized firmware is named accordingly. 1. Download modified firmware file `WAVLINK_WN536AX6-A_M36AX6_V250320-WO-437baca-modified.bin` from https://github.com/ses1er/firmware-misc/tree/main/wavlink/wl-wn536ax6a 2. Log into WebUI on default IP: http://192.168.20.1 3. Browse to More (top menu) -> System -> Firmware Upgrade. 4. Under `Local Upgrade` section, check the device to be upgraded and upload downloaded modified firmware. Click `UPLOAD FILE`, then `APPLY` 5. Wait about 2 minutes (ignore progress bar), and browse to http://192.168.20.1. You should see LUCI login page. Username is root and no password. 6. Browse to `System -> Backup/Flash Firmware`, click on `Flash Image`, click `Browse` and locate `openwrt-mediatek-filogic-wavlink_wl-wn536ax6-a-squashfs-sysupgrade.bin` file. 7. Uncheck `Keep settings and retain the current configuration` and click `Continue`. 8. Router will now be set to IP 192.168.1.1 which is the Openwrt default. * Installation with UART: Note: Having UART connected while cold booting the device will result in a kernel panic when initializing wifi. I've found this workaround: 1. Power off the device and ensure UART is not connected to PC. 2. Power up the device, when lights come on, plug in UART. 3. Warm boots and soft restarts will not cause kernel panic for the duration of device being powered on. Repeat steps for subsequent cold boots. 1. Configure TFTP server with IP 192.168.1.66. Copy `openwrt-mediatek-filogic-wavlink_wl-wn536ax6a-initramfs.itb` to TFTP root. 2. Interrupt boot by pressing 0. 3. Run the following in Uboot console: `setenv serverip 192.168.1.66; setenv ipaddr 192.168.1.1; tftpboot 0x46000000 openwrt-mediatek-filogic-wavlink_wl-wn536ax6-a-initramfs.itb; bootm` 4. Transfer `openwrt-mediatek-filogic-wavlink_wl-wn536ax6-a-squashfs-sysupgrade.bin` to device: (`scp -O openwrt-mediatek-filogic-wavlink_wl-wn536ax6-a-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/`) 5. Run the following on device: `sysupgrade -n /tmp/openwrt-mediatek-filogic-wavlink_wl-wn536ax6-a-squashfs-sysupgrade.bin` Signed-off-by: Qing W. <ses1er@gmail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://github.com/openwrt/openwrt/pull/20760 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Qing W.
Hauke Mehrtens
parent
9bdf723476
commit
1748ce8295
385
target/linux/mediatek/dts/mt7986a-wavlink-wl-wn536ax6-a.dts
Normal file
385
target/linux/mediatek/dts/mt7986a-wavlink-wl-wn536ax6-a.dts
Normal file
@ -0,0 +1,385 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pinctrl/mt65xx.h>
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#include "mt7986a.dtsi"
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/ {
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compatible = "wavlink,wl-wn536ax6-a", "mediatek,mt7986a";
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model = "WAVLINK WL-WN536AX6 Rev a";
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aliases {
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serial0 = &uart0;
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label-mac-device = &wifi;
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led-boot = &led_status_blue;
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led-failsafe = &led_status_blue;
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led-running = &led_status_blue;
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led-upgrade = &led_status_blue;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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};
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pair {
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label = "pair";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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};
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turbo {
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label = "turbo";
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linux,code = <BTN_MISC>;
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gpios = <&pio 12 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led-0 {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_WAN;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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};
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led-1 {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_POWER;
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gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
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};
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led_status_blue: led-2 {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&pio 31 GPIO_ACTIVE_LOW>;
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};
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led-3 {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_WLAN;
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gpios = <&pio 32 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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};
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memory@40000000 {
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reg = <0 0x40000000 0 0x20000000>;
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device_type = "memory";
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&crypto {
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status = "okay";
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};
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ð {
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status = "okay";
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/* LAN */
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_hw_44e 0>;
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fixed-link {
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full-duplex;
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pause;
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speed = <2500>;
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};
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};
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/* WAN */
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "2500base-x";
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phy-handle = <&phy6>;
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_hw_44e 1>;
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};
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mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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/* MaxLinear GPY211C 2.5G PHY */
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phy6: phy@6 {
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/*
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* Force the ID here as the PHY only reports it's
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* (C45) ID correctly after a reset (before resetting
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* it reports 0xfffffff, which causes only the genphy
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* driver to match).
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*/
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compatible = "ethernet-phy-id67c9.de10";
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reg = <6>;
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reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
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reset-assert-us = <600>;
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reset-deassert-us = <20000>;
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phy-mode = "2500base-x";
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};
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switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan4";
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};
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port@1 {
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reg = <1>;
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label = "lan3";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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};
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&pio {
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spi_flash_pins: spi-flash-pins-33-to-38 {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pd {
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pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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drive-strength = <MTK_DRIVE_8mA>;
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};
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conf-pu {
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pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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drive-strength = <MTK_DRIVE_8mA>;
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};
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};
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wf_2g_5g_pins: wf_2g_5g-pins {
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mux {
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function = "wifi";
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groups = "wf_2g", "wf_5g";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <MTK_DRIVE_4mA>;
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};
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};
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wf_dbdc_pins: wf_dbdc-pins {
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mux {
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function = "wifi";
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groups = "wf_dbdc";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <MTK_DRIVE_4mA>;
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};
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_flash_pins>;
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status = "okay";
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/* Macronix SPI NAND (128M) */
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flash@0 {
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compatible = "spi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-cal-enable;
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spi-cal-mode = "read-data";
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spi-cal-datalen = <7>;
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spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>;
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spi-cal-addrlen = <5>;
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spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "BL2";
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reg = <0x0 0x100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x100000 0x80000>;
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};
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partition@180000 {
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label = "Factory";
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reg = <0x180000 0x200000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x1000>;
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};
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};
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};
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partition@380000 {
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label = "FIP";
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reg = <0x380000 0x200000>;
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read-only;
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};
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0x4000000>;
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};
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partition@7580000 {
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label = "HW";
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reg = <0x4580000 0x80000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_hw_44e: macaddr@44e {
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compatible = "mac-base";
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reg = <0x44e 0x11>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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};
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};
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};
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&ssusb {
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status = "okay";
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vusb33-supply = <®_3p3v>;
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vbus-supply = <®_5v>;
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};
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&uart0 {
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&trng {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&wifi {
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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pinctrl-names = "default", "dbdc";
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pinctrl-0 = <&wf_2g_5g_pins>;
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pinctrl-1 = <&wf_dbdc_pins>;
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status = "okay";
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};
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@ -233,6 +233,10 @@ tplink,re6000xd)
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ucidef_set_led_netdev "lan-2" "lan-2" "blue:lan-1" "lan2" "link tx rx"
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ucidef_set_led_netdev "eth1" "lan-3" "blue:lan-2" "eth1" "link tx rx"
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;;
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wavlink,wl-wn536ax6-a)
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ucidef_set_led_netdev "wifi" "wifi" "blue:wlan" "phy1-ap0" "link"
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ucidef_set_led_netdev "wan" "wan" "blue:wan" "eth1" "link tx rx"
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;;
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wavlink,wl-wn551x3)
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ucidef_set_led_netdev "lan-1" "lan-1" "green:lan-1" "lan1" "link tx rx"
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ucidef_set_led_netdev "lan-2" "lan-2" "green:lan-2" "lan2" "link tx rx"
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@ -68,6 +68,7 @@ mediatek_setup_interfaces()
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nradio,c8-668gl|\
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ruijie,rg-x60-pro|\
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unielec,u7981-01*|\
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wavlink,wl-wn536ax6-a|\
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zbtlink,zbt-z8102ax|\
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zbtlink,zbt-z8102ax-v2)
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ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1
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@ -2451,6 +2451,24 @@ define Device/unielec_u7981-01-nand
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endef
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TARGET_DEVICES += unielec_u7981-01-nand
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define Device/wavlink_wl-wn536ax6-a
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DEVICE_VENDOR := WAVLINK
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DEVICE_MODEL := WL-WN536AX6
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DEVICE_VARIANT := Rev a
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DEVICE_DTS := mt7986a-wavlink-wl-wn536ax6-a
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DEVICE_DTS_DIR := ../dts
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DEVICE_DTS_LOADADDR := 0x47000000
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UBINIZE_OPTS := -E 5
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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IMAGE_SIZE := 65536k
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KERNEL_INITRAMFS_SUFFIX := .itb
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KERNEL_IN_UBI := 1
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||||
DEVICE_PACKAGES := kmod-usb3 kmod-mt7915e kmod-mt7986-firmware mt7986-wo-firmware
|
||||
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
|
||||
endef
|
||||
TARGET_DEVICES += wavlink_wl-wn536ax6-a
|
||||
|
||||
define Device/wavlink_wl-wn551x3
|
||||
DEVICE_VENDOR := WAVLINK
|
||||
DEVICE_MODEL := WL-WN551X3
|
||||
|
||||
Loading…
Reference in New Issue
Block a user