mirror of
git://git.openwrt.org/openwrt/openwrt.git
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mediatek: filogic: move mt7981 on-SoC blocks to "soc" node in DT
It's a standard way of grouping on-SoC hardware blocks and this matches upstream DTS. Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
This commit is contained in:
Rafał Miłecki
parent
fba79f39f2
commit
0ef9274721
@ -41,6 +41,12 @@
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};
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};
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soc {
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compatible = "simple-bus";
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ranges;
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#address-cells = <2>;
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#size-cells = <2>;
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pwm: pwm@10048000 {
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compatible = "mediatek,mt7981-pwm";
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reg = <0 0x10048000 0 0x1000>;
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@ -53,85 +59,6 @@
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clock-names = "top", "main", "pwm1", "pwm2", "pwm3";
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};
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fan: pwm-fan {
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compatible = "pwm-fan";
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/* cooling level (0, 1, 2, 3, 4, 5, 6, 7) : (0%/25%/37.5%/50%/62.5%/75%/87.5%/100% duty) */
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cooling-levels = <0 63 95 127 159 191 223 255>;
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#cooling-cells = <2>;
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status = "disabled";
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};
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thermal-zones {
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cpu_thermal: cpu-thermal {
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polling-delay-passive = <1000>;
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polling-delay = <1000>;
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thermal-sensors = <&thermal 0>;
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trips {
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cpu_trip_active_highest: active-highest {
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temperature = <70000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_trip_active_high: active-high {
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temperature = <60000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_trip_active_med: active-med {
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temperature = <50000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_trip_active_low: active-low {
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temperature = <45000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_trip_active_lowest: active-lowest {
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temperature = <40000>;
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hysteresis = <2000>;
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type = "active";
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};
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};
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cooling-maps {
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cpu-active-highest {
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/* active: set fan to cooling level 7 */
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cooling-device = <&fan 7 7>;
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trip = <&cpu_trip_active_highest>;
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};
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cpu-active-high {
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/* active: set fan to cooling level 5 */
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cooling-device = <&fan 5 5>;
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trip = <&cpu_trip_active_high>;
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};
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cpu-active-med {
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/* active: set fan to cooling level 3 */
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cooling-device = <&fan 3 3>;
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trip = <&cpu_trip_active_med>;
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};
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cpu-active-low {
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/* active: set fan to cooling level 2 */
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cooling-device = <&fan 2 2>;
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trip = <&cpu_trip_active_low>;
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};
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cpu-active-lowest {
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/* active: set fan to cooling level 1 */
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cooling-device = <&fan 1 1>;
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trip = <&cpu_trip_active_lowest>;
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};
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};
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};
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};
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thermal: thermal@1100c800 {
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#thermal-sensor-cells = <1>;
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compatible = "mediatek,mt7981-thermal", "mediatek,mt7986-thermal";
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@ -172,56 +99,6 @@
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<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* 64 KiB reserved for ramoops/pstore */
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ramoops@42ff0000 {
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compatible = "ramoops";
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reg = <0 0x42ff0000 0 0x10000>;
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record-size = <0x1000>;
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};
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/* 192 KiB reserved for ARM Trusted Firmware (BL31) */
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secmon_reserved: secmon@43000000 {
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reg = <0 0x43000000 0 0x30000>;
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no-map;
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};
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wmcpu_emi: wmcpu-reserved@47c80000 {
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reg = <0 0x47c80000 0 0x100000>;
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no-map;
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};
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wo_emi0: wo-emi@47d80000 {
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reg = <0 0x47d80000 0 0x40000>;
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no-map;
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};
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wo_data: wo-data@47dc0000 {
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reg = <0 0x47dc0000 0 0x240000>;
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no-map;
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};
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};
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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trng {
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compatible = "mediatek,mt7981-rng";
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};
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clk40m: oscillator@0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <40000000>;
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clock-output-names = "clkxtal";
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};
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infracfg: infracfg@10001000 {
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compatible = "mediatek,mt7981-infracfg", "syscon";
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reg = <0 0x10001000 0 0x1000>;
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@ -240,17 +117,6 @@
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#clock-cells = <1>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&gic>;
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clock-frequency = <13000000>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
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};
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watchdog: watchdog@1001c000 {
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compatible = "mediatek,mt7986-wdt",
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"mediatek,mt6589-wdt";
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@ -722,15 +588,6 @@
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};
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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efuse: efuse@11f20000 {
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compatible = "mediatek,mt7981-efuse",
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"mediatek,efuse";
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@ -790,13 +647,6 @@
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status = "disabled";
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};
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ice: ice_debug {
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compatible = "mediatek,mt7981-ice_debug",
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"mediatek,mt2701-ice_debug";
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clocks = <&infracfg CLK_INFRA_DBG_CK>;
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clock-names = "ice_dbg";
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};
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wifi: wifi@18000000 {
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compatible = "mediatek,mt7981-wmac";
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resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>;
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@ -817,3 +667,160 @@
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status = "disabled";
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};
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};
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fan: pwm-fan {
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compatible = "pwm-fan";
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/* cooling level (0, 1, 2, 3, 4, 5, 6, 7) : (0%/25%/37.5%/50%/62.5%/75%/87.5%/100% duty) */
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cooling-levels = <0 63 95 127 159 191 223 255>;
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#cooling-cells = <2>;
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status = "disabled";
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};
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thermal-zones {
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cpu_thermal: cpu-thermal {
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polling-delay-passive = <1000>;
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polling-delay = <1000>;
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thermal-sensors = <&thermal 0>;
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trips {
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cpu_trip_active_highest: active-highest {
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temperature = <70000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_trip_active_high: active-high {
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temperature = <60000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_trip_active_med: active-med {
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temperature = <50000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_trip_active_low: active-low {
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temperature = <45000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_trip_active_lowest: active-lowest {
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temperature = <40000>;
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hysteresis = <2000>;
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type = "active";
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};
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};
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cooling-maps {
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cpu-active-highest {
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/* active: set fan to cooling level 7 */
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cooling-device = <&fan 7 7>;
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trip = <&cpu_trip_active_highest>;
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};
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cpu-active-high {
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/* active: set fan to cooling level 5 */
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cooling-device = <&fan 5 5>;
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trip = <&cpu_trip_active_high>;
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};
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cpu-active-med {
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/* active: set fan to cooling level 3 */
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cooling-device = <&fan 3 3>;
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trip = <&cpu_trip_active_med>;
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};
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cpu-active-low {
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/* active: set fan to cooling level 2 */
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cooling-device = <&fan 2 2>;
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trip = <&cpu_trip_active_low>;
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};
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cpu-active-lowest {
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/* active: set fan to cooling level 1 */
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cooling-device = <&fan 1 1>;
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trip = <&cpu_trip_active_lowest>;
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};
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};
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};
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* 64 KiB reserved for ramoops/pstore */
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ramoops@42ff0000 {
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compatible = "ramoops";
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reg = <0 0x42ff0000 0 0x10000>;
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record-size = <0x1000>;
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};
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/* 192 KiB reserved for ARM Trusted Firmware (BL31) */
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secmon_reserved: secmon@43000000 {
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reg = <0 0x43000000 0 0x30000>;
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no-map;
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};
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wmcpu_emi: wmcpu-reserved@47c80000 {
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reg = <0 0x47c80000 0 0x100000>;
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no-map;
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};
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wo_emi0: wo-emi@47d80000 {
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reg = <0 0x47d80000 0 0x40000>;
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no-map;
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};
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wo_data: wo-data@47dc0000 {
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reg = <0 0x47dc0000 0 0x240000>;
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no-map;
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};
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};
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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trng {
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compatible = "mediatek,mt7981-rng";
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};
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clk40m: oscillator@0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <40000000>;
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clock-output-names = "clkxtal";
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&gic>;
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clock-frequency = <13000000>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ice: ice_debug {
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compatible = "mediatek,mt7981-ice_debug",
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"mediatek,mt2701-ice_debug";
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clocks = <&infracfg CLK_INFRA_DBG_CK>;
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clock-names = "ice_dbg";
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};
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};
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